diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-06-10 17:28:22 +0200 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-06-10 19:45:48 +0200 |
commit | f4a091c71baa55dc8822614ab716525779623c1c (patch) | |
tree | e68d571496458aecfe00162d58f67889558a8759 /drivers/gpu/drm/i915/intel_display.c | |
parent | d925c59a8174c8c150da7e0a38e35d89a8e7149c (diff) | |
download | blackbird-op-linux-f4a091c71baa55dc8822614ab716525779623c1c.tar.gz blackbird-op-linux-f4a091c71baa55dc8822614ab716525779623c1c.zip |
drm/i915: lock down pch pll accouting some more
Before I start to make a complete mess out of this, crank up
the paranoia level a bit.
v2: Kill the has_pch_encoder check in put_shared_dpll - it's invalid
as spotted by Ville since we currently only put the dpll when we
already have the new pipe config. So a direct pch port -> cpu edp
transition will hit this.
v3: Now that I've lifted my blinders add the WARN_ON Ville requested.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 39984fb07fa9..34e6bf3b1142 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1432,6 +1432,7 @@ static void ironlake_enable_pch_pll(struct intel_crtc *intel_crtc) assert_pch_pll_enabled(dev_priv, pll, NULL); return; } + WARN_ON(pll->on); DRM_DEBUG_KMS("enabling PCH PLL %x\n", pll->pll_reg); @@ -1470,6 +1471,7 @@ static void intel_disable_pch_pll(struct intel_crtc *intel_crtc) } assert_pch_pll_enabled(dev_priv, pll, NULL); + WARN_ON(!pll->on); if (--pll->active) return; @@ -3069,7 +3071,11 @@ static void intel_put_pch_pll(struct intel_crtc *intel_crtc) return; } - --pll->refcount; + if (--pll->refcount == 0) { + WARN_ON(pll->on); + WARN_ON(pll->active); + } + intel_crtc->pch_pll = NULL; } |