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author | Jani Nikula <jani.nikula@intel.com> | 2016-12-07 22:48:09 +0200 |
---|---|---|
committer | Jani Nikula <jani.nikula@intel.com> | 2016-12-07 23:28:33 +0200 |
commit | 73f67aa8cc3c0ab7299f2fc81049a7d8d934fef8 (patch) | |
tree | d92d6b2e7125f13ac2370e900575858966107460 /drivers/gpu/drm/i915/i915_gem.c | |
parent | ccc24b39a6fa3b0ba6b4310c10d7e0288ec8db10 (diff) | |
download | blackbird-op-linux-73f67aa8cc3c0ab7299f2fc81049a7d8d934fef8.tar.gz blackbird-op-linux-73f67aa8cc3c0ab7299f2fc81049a7d8d934fef8.zip |
drm/i915: distinguish G33 and Pineview from each other
Pineview deserves to use its own platform enum (which was already added,
unused, previously). IS_G33() no longer matches Pineview, and gets
replaced by IS_G33() || IS_PINEVIEW() or equivalent. Pineview is no
longer an outlier among platform definitions.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1481143689-19672-1-git-send-email-jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem.c')
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index dd1a34ac830f..36183945e61a 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -2084,7 +2084,8 @@ u64 i915_gem_get_ggtt_alignment(struct drm_i915_private *dev_priv, u64 size, * Minimum alignment is 4k (GTT page size), but might be greater * if a fence register is needed for the object. */ - if (INTEL_GEN(dev_priv) >= 4 || (!fenced && IS_G33(dev_priv)) || + if (INTEL_GEN(dev_priv) >= 4 || + (!fenced && (IS_G33(dev_priv) || IS_PINEVIEW(dev_priv))) || tiling_mode == I915_TILING_NONE) return 4096; @@ -4498,8 +4499,9 @@ i915_gem_load_init_fences(struct drm_i915_private *dev_priv) if (INTEL_INFO(dev_priv)->gen >= 7 && !IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) dev_priv->num_fence_regs = 32; - else if (INTEL_INFO(dev_priv)->gen >= 4 || IS_I945G(dev_priv) || - IS_I945GM(dev_priv) || IS_G33(dev_priv)) + else if (INTEL_INFO(dev_priv)->gen >= 4 || + IS_I945G(dev_priv) || IS_I945GM(dev_priv) || + IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) dev_priv->num_fence_regs = 16; else dev_priv->num_fence_regs = 8; |