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author | Suketu Shah <suketu.j.shah@intel.com> | 2014-11-24 13:37:45 +0530 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-04-16 09:27:17 +0200 |
commit | 31335cec02604cba72deee44bb18cb82790ef2aa (patch) | |
tree | afc96d92f2d6a9831f4b65962e9ab37a38df9462 /drivers/gpu/drm/i915/i915_gem.c | |
parent | 664326f8a5b7e4ab7ed469acaadc63d2a05d8720 (diff) | |
download | blackbird-op-linux-31335cec02604cba72deee44bb18cb82790ef2aa.tar.gz blackbird-op-linux-31335cec02604cba72deee44bb18cb82790ef2aa.zip |
drm/i915/bxt: Add DC9 Trigger sequence
Add triggers for DC9 as per details provided in bxt_enable_dc9
and bxt_disable_dc9 implementations.
v1:
- Add SKL check in gen9_disable_dc5 as it is possible for DC5
to remain disabled only for SKL.
- Add additional checks for whether DC5 is already disabled during
DC5-disabling only for BXT.
v2:
- rebase to latest.
- Load CSR during DC9 disabling in the beginning before DC9 is
disabled.
- Make gen9_disable_dc5 function non-static as it's being called by
functions in i915_drv.c.
- Enable DC9-related functionality using a macro.
v3: (imre)
- remove BXT_ENABLE_DC9, we want DC9 always, and it's only valid on BXT
- remove DC5 disabling and CSR FW loaded check, these are nop atm
- squash in Vandana's "Do ddi_phy_init always" patch
v4:
- add TODO to re-enable DC5 during resume if CSR FW is available (sagar)
Signed-off-by: Suketu Shah <suketu.j.shah@intel.com>
Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com> (v2)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Sagar Kamble <sagar.a.kamble@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem.c')
0 files changed, 0 insertions, 0 deletions