Merge tag 'drm-intel-next-2015-09-28-merged' of git://anongit.freedesktop.org/drm-intel into drm-next

drm-intel-next-2015-09-28:
- fastboot by default for some systems (Maarten Lankhorts)
- piles of workarounds for bxt and skl
- more fbc work from Paulo
- fix hdmi hotplug detection (Sonika)
- first few patches from Ville to parametrize register macros, prep work for
  typesafe mmio functions
- prep work for nv12 rotation (Tvrtko Ursulin)
- various other bugfixes and improvements all over

I have another backmerge here since things became messy and I didn't
realize you resolved some of them already (usually you complain when
there's a conflict ...).

For 4.4 I plan one more feature round after this and then that's it.
* tag 'drm-intel-next-2015-09-28-merged' of git://anongit.freedesktop.org/drm-intel: (80 commits)
  drm/i915: Update DRIVER_DATE to 20150928
  drm/i915: fix task reference leak in i915_debugfs.c
  drm/i915: Defer adding preallocated stolen objects to the VM list
  drm/i915: Remove extraneous request cancel.
  drm/i915: Enable querying offset of UV plane with intel_plane_obj_offset
  drm/i915: Support NV12 in rotated GGTT mapping
  drm/i915: Support appending to the rotated pages mapping
  drm/i915: Support planar formats in tile height calculations
  drm/i915/bxt: Update revision id for BXT C0
  drm/i915: Parametrize CSR_PROGRAM registers
  drm/i915: Parametrize DDI_BUF_TRANS registers
  drm/i915: Parametrize TV luma/chroma filter registers
  drm/i915: Replace raw numbers with the approproate register name in ILK turbo code
  drm/i915: Parametrize ILK turbo registers
  drm/i915: Parametrize FBC_TAG registers
  drm/i915: Parametrize GEN7_GT_SCRATCH and GEN7_LRA_LIMITS
  drm/i915: Parametrize LRC registers
  drm/i915: Don't pass sdvo_reg to intel_sdvo_select_{ddc, i2c}_bus()
  drm/i915: Ignore "digital output" and "not HDMI output" bits for eDP detection
  drm/i915: Make sure we don't detect eDP on g4x
  ...

1 files changed, 4 insertions, 11 deletions

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 066a0efa75d7..817b05ce8dd3 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -631,17 +631,6 @@ static void gen9_sseu_info_init(struct drm_device *dev)
 	u32 fuse2, s_enable, ss_disable, eu_disable;
 	u8 eu_mask = 0xff;
 
-	/*
-	 * BXT has a single slice. BXT also has at most 6 EU per subslice,
-	 * and therefore only the lowest 6 bits of the 8-bit EU disable
-	 * fields are valid.
-	*/
-	if (IS_BROXTON(dev)) {
-		s_max = 1;
-		eu_max = 6;
-		eu_mask = 0x3f;
-	}
-
 	info = (struct intel_device_info *)&dev_priv->info;
 	fuse2 = I915_READ(GEN8_FUSE2);
 	s_enable = (fuse2 & GEN8_F2_S_ENA_MASK) >>
@@ -1137,6 +1126,10 @@ int i915_driver_unload(struct drm_device *dev)
 		dev_priv->vbt.child_dev = NULL;
 		dev_priv->vbt.child_dev_num = 0;
 	}
+	kfree(dev_priv->vbt.sdvo_lvds_vbt_mode);
+	dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
+	kfree(dev_priv->vbt.lfp_lvds_vbt_mode);
+	dev_priv->vbt.lfp_lvds_vbt_mode = NULL;
 
 	vga_switcheroo_unregister_client(dev->pdev);
 	vga_client_register(dev->pdev, NULL, NULL, NULL);