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| author | Imre Deak <imre.deak@intel.com> | 2016-08-31 19:13:04 +0300 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2016-09-02 18:17:14 +0300 |
| commit | f08a0c9234c86cf0249a5edd58a7abf69617f29f (patch) | |
| tree | ee6f1b4c55b5653edaee5f1031d03c11fb64026e /drivers/gpu/drm/i915/i915_debugfs.c | |
| parent | 615d8908ac9c723d8666bde44a7acc85af0baace (diff) | |
| download | blackbird-op-linux-f08a0c9234c86cf0249a5edd58a7abf69617f29f.tar.gz blackbird-op-linux-f08a0c9234c86cf0249a5edd58a7abf69617f29f.zip | |
drm/i915: sseu: Convert slice count field to mask
In an upcoming patch we'll need the actual mask of slices in addition to
their count, so replace the count field with a mask.
v2:
- Use hweight8() on u8 typed vars instead of hweight32(). (Ben)
Reviewed-by: Robert Bragg <robert@sixbynine.org> (v1)
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com> (v1)
Tested-by: Ben Widawsky <benjamin.widawsky@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1472659987-10417-5-git-send-email-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_debugfs.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_debugfs.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index cbd9c7625450..0ba28a8ad669 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -5007,7 +5007,7 @@ static void cherryview_sseu_device_status(struct drm_i915_private *dev_priv, /* skip disabled subslice */ continue; - sseu->slice_total = 1; + sseu->slice_mask = BIT(0); sseu->subslice_per_slice++; eu_cnt = ((sig1[ss] & CHV_EU08_PG_ENABLE) ? 0 : 2) + ((sig1[ss] & CHV_EU19_PG_ENABLE) ? 0 : 2) + @@ -5055,7 +5055,7 @@ static void gen9_sseu_device_status(struct drm_i915_private *dev_priv, /* skip disabled slice */ continue; - sseu->slice_total++; + sseu->slice_mask |= BIT(s); if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) ss_cnt = INTEL_INFO(dev_priv)->sseu.subslice_per_slice; @@ -5092,19 +5092,19 @@ static void broadwell_sseu_device_status(struct drm_i915_private *dev_priv, u32 slice_info = I915_READ(GEN8_GT_SLICE_INFO); int s; - sseu->slice_total = hweight32(slice_info & GEN8_LSLICESTAT_MASK); + sseu->slice_mask = slice_info & GEN8_LSLICESTAT_MASK; - if (sseu->slice_total) { + if (sseu->slice_mask) { sseu->subslice_per_slice = INTEL_INFO(dev_priv)->sseu.subslice_per_slice; - sseu->subslice_total = sseu->slice_total * + sseu->subslice_total = hweight8(sseu->slice_mask) * sseu->subslice_per_slice; sseu->eu_per_subslice = INTEL_INFO(dev_priv)->sseu.eu_per_subslice; sseu->eu_total = sseu->eu_per_subslice * sseu->subslice_total; /* subtract fused off EU(s) from enabled slice(s) */ - for (s = 0; s < sseu->slice_total; s++) { + for (s = 0; s < hweight8(sseu->slice_mask); s++) { u8 subslice_7eu = INTEL_INFO(dev_priv)->sseu.subslice_7eu[s]; @@ -5120,7 +5120,7 @@ static void i915_print_sseu_info(struct seq_file *m, bool is_available_info, const char *type = is_available_info ? "Available" : "Enabled"; seq_printf(m, " %s Slice Total: %u\n", type, - sseu->slice_total); + hweight8(sseu->slice_mask)); seq_printf(m, " %s Subslice Total: %u\n", type, sseu->subslice_total); seq_printf(m, " %s Subslice Per Slice: %u\n", type, |
