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author | Dave Airlie <airlied@redhat.com> | 2016-09-28 11:27:05 +1000 |
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committer | Dave Airlie <airlied@redhat.com> | 2016-09-28 11:27:05 +1000 |
commit | 9f4ef05bcdcfdf911b056b471dd3c6a4f331b644 (patch) | |
tree | ba8dfba87b4fe5295598f5438881822b6d3395f0 /drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.h | |
parent | 81c5d6aa3983662b6b48b504fe3a0a4c640f6a84 (diff) | |
parent | beb86f29c9c7f2d04f9a42c4c61cc469c3689779 (diff) | |
download | blackbird-op-linux-9f4ef05bcdcfdf911b056b471dd3c6a4f331b644.tar.gz blackbird-op-linux-9f4ef05bcdcfdf911b056b471dd3c6a4f331b644.zip |
Merge branch 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux into drm-next
Last set of radeon and amdgpu changes for 4.9. This is
mostly just the powerplay cleanup for dGPUs. Beyond that,
just misc code cleanups and bug fixes.
* 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux: (49 commits)
drm/amd/amdgpu: Clean up afmt allocation in DCEv6. (v2)
drm/amd/amdgpu: Remove division from vblank_wait
drm/radeon/atif: Send a hotplug event when we get dgpu display request
drm/radeon/atpx: check for ATIF dGPU wake for display events support
drm/amdgpu/atif: Send a hotplug event when we get dgpu display request
drm/amdgpu/atpx: check for ATIF dGPU wake for display events support
drm/amdgpu: bump version for new vce packet support
drm/amdgpu/vce: allow the clock table packet
drm/amdgpu:cleanup virt related define
drm/amdgpu: use powerplay module for dgpu in Vi.
drm/amdgpu: set gfx clock gating for tonga/polaris.
drm/amdgpu: set system clock gating for tonga/polaris.
drm/amd/powerplay: export function to help to set cg by smu.
drm/amdgpu: avoid out of bounds access on array interrupt_status_offsets
drm/amdgpu: mark symbols static where possible
drm/amdgpu: remove unused functions
drm/amd/powerplay: Replace per-asic print_performance with generic
drm/radeon: narrow asic_init for virtualization
drm/amdgpu:add fw version entry to info
drm/amdgpu:determine if vPost is needed indeed
...
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.h')
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.h | 63 |
1 files changed, 35 insertions, 28 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.h b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.h index 62009a7ae827..cfadfeeea039 100644 --- a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.h +++ b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.h @@ -26,39 +26,46 @@ #ifndef _ICELAND_SMUMGR_H_ #define _ICELAND_SMUMGR_H_ -struct iceland_buffer_entry { - uint32_t data_size; - uint32_t mc_addr_low; - uint32_t mc_addr_high; - void *kaddr; - unsigned long handle; -}; -/* Iceland only has header_buffer, don't have smu buffer. */ -struct iceland_smumgr { - uint8_t *pHeader; - uint8_t *pMecImage; - uint32_t ulSoftRegsStart; +#include "smu7_smumgr.h" +#include "pp_endian.h" +#include "smu71_discrete.h" - struct iceland_buffer_entry header_buffer; +struct iceland_pt_defaults { + uint8_t svi_load_line_en; + uint8_t svi_load_line_vddc; + uint8_t tdc_vddc_throttle_release_limit_perc; + uint8_t tdc_mawt; + uint8_t tdc_waterfall_ctl; + uint8_t dte_ambient_temp_base; + uint32_t display_cac; + uint32_t bamp_temp_gradient; + uint16_t bapmti_r[SMU71_DTE_ITERATIONS * SMU71_DTE_SOURCES * SMU71_DTE_SINKS]; + uint16_t bapmti_rc[SMU71_DTE_ITERATIONS * SMU71_DTE_SOURCES * SMU71_DTE_SINKS]; }; -extern int iceland_smum_init(struct pp_smumgr *smumgr); -extern int iceland_copy_bytes_to_smc(struct pp_smumgr *smumgr, - uint32_t smcStartAddress, - const uint8_t *src, - uint32_t byteCount, uint32_t limit); - -extern int iceland_smu_start_smc(struct pp_smumgr *smumgr); +struct iceland_mc_reg_entry { + uint32_t mclk_max; + uint32_t mc_data[SMU71_DISCRETE_MC_REGISTER_ARRAY_SIZE]; +}; -extern int iceland_read_smc_sram_dword(struct pp_smumgr *smumgr, - uint32_t smcAddress, - uint32_t *value, uint32_t limit); -extern int iceland_write_smc_sram_dword(struct pp_smumgr *smumgr, - uint32_t smcAddress, - uint32_t value, uint32_t limit); +struct iceland_mc_reg_table { + uint8_t last; /* number of registers*/ + uint8_t num_entries; /* number of entries in mc_reg_table_entry used*/ + uint16_t validflag; /* indicate the corresponding register is valid or not. 1: valid, 0: invalid. bit0->address[0], bit1->address[1], etc.*/ + struct iceland_mc_reg_entry mc_reg_table_entry[MAX_AC_TIMING_ENTRIES]; + SMU71_Discrete_MCRegisterAddress mc_reg_address[SMU71_DISCRETE_MC_REGISTER_ARRAY_SIZE]; +}; -extern bool iceland_is_smc_ram_running(struct pp_smumgr *smumgr); -extern int iceland_smu_upload_firmware_image(struct pp_smumgr *smumgr); +struct iceland_smumgr { + struct smu7_smumgr smu7_data; + struct SMU71_Discrete_DpmTable smc_state_table; + struct SMU71_Discrete_PmFuses power_tune_table; + struct SMU71_Discrete_Ulv ulv_setting; + struct iceland_pt_defaults *power_tune_defaults; + SMU71_Discrete_MCRegisters mc_regs; + struct iceland_mc_reg_table mc_reg_table; + uint32_t activity_target[SMU71_MAX_LEVELS_GRAPHICS]; +}; #endif |