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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2017-02-27 09:30:11 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2017-02-27 09:30:11 +0100 |
| commit | c771633daf951439ef1875b0da52b56e5696d19f (patch) | |
| tree | bc27744497735062f372ac7b67a0d81b96d24c75 /drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | |
| parent | 62b695662a2413286a25df418b0af665bf2899c5 (diff) | |
| parent | 64a577196d66b44e37384bc5c4d78c61f59d5b2a (diff) | |
| download | blackbird-op-linux-c771633daf951439ef1875b0da52b56e5696d19f.tar.gz blackbird-op-linux-c771633daf951439ef1875b0da52b56e5696d19f.zip | |
Merge airlied/drm-next into drm-misc-next
Backmerge the main pull request to sync up with all the newly landed
drivers. Otherwise we'll have chaos even before 4.12 started in
earnest.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c index f15df99f0a06..b34cefc7ebd5 100644 --- a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c +++ b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c @@ -401,7 +401,8 @@ static void uvd_v4_2_stop(struct amdgpu_device *adev) break; mdelay(1); } - break; + if (status & 2) + break; } for (i = 0; i < 10; ++i) { @@ -411,7 +412,8 @@ static void uvd_v4_2_stop(struct amdgpu_device *adev) break; mdelay(1); } - break; + if (status & 0xf) + break; } /* Stall UMC and register bus before resetting VCPU */ @@ -424,7 +426,8 @@ static void uvd_v4_2_stop(struct amdgpu_device *adev) break; mdelay(1); } - break; + if (status & 0x240) + break; } WREG32_P(0x3D49, 0, ~(1 << 2)); @@ -723,7 +726,8 @@ static int uvd_v4_2_set_powergating_state(void *handle, if (state == AMD_PG_STATE_GATE) { uvd_v4_2_stop(adev); if (adev->pg_flags & AMD_PG_SUPPORT_UVD && amdgpu_dpm == 0) { - if (!(RREG32_SMC(ixCURRENT_PG_STATUS) & 0x4)) { + if (!(RREG32_SMC(ixCURRENT_PG_STATUS) & + CURRENT_PG_STATUS__UVD_PG_STATUS_MASK)) { WREG32(mmUVD_PGFSM_CONFIG, (UVD_PGFSM_CONFIG__UVD_PGFSM_FSM_ADDR_MASK | UVD_PGFSM_CONFIG__UVD_PGFSM_POWER_DOWN_MASK | UVD_PGFSM_CONFIG__UVD_PGFSM_P1_SELECT_MASK)); @@ -733,7 +737,8 @@ static int uvd_v4_2_set_powergating_state(void *handle, return 0; } else { if (adev->pg_flags & AMD_PG_SUPPORT_UVD && amdgpu_dpm == 0) { - if (RREG32_SMC(ixCURRENT_PG_STATUS) & 0x4) { + if (RREG32_SMC(ixCURRENT_PG_STATUS) & + CURRENT_PG_STATUS__UVD_PG_STATUS_MASK) { WREG32(mmUVD_PGFSM_CONFIG, (UVD_PGFSM_CONFIG__UVD_PGFSM_FSM_ADDR_MASK | UVD_PGFSM_CONFIG__UVD_PGFSM_POWER_UP_MASK | UVD_PGFSM_CONFIG__UVD_PGFSM_P1_SELECT_MASK)); |
