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authorShawn Guo <shawn.guo@linaro.org>2011-07-19 21:16:56 +0800
committerGrant Likely <grant.likely@secretlab.ca>2011-07-19 13:10:02 -0600
commit591567a5ea25852f20b7ef2953f6f72020121199 (patch)
treefc76a7575eefa32f214e42c35e592467faad5934 /drivers/gpio
parent752ad5e82dfd83851e44a2b9da8761994cd7e61c (diff)
downloadblackbird-op-linux-591567a5ea25852f20b7ef2953f6f72020121199.tar.gz
blackbird-op-linux-591567a5ea25852f20b7ef2953f6f72020121199.zip
gpio/mxc/mxs: fix build error introduced by the irq_gc_ack() renaming
The following commit renames irq_gc_ack() to irq_gc_ack_set_bit(), and makes gpio-mxc and gpio-mxs fail to build. 659fb32d1b67476f4ade25e9ea0e2642a5b9c4b5 genirq: replace irq_gc_ack() with {set,clr}_bit variants (fwd) The patch fixed a couple of typo of comma to semicolon. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/gpio')
-rw-r--r--drivers/gpio/gpio-mxc.c4
-rw-r--r--drivers/gpio/gpio-mxs.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
index 89fda58db90d..4340acae3bd3 100644
--- a/drivers/gpio/gpio-mxc.c
+++ b/drivers/gpio/gpio-mxc.c
@@ -297,11 +297,11 @@ static void __init mxc_gpio_init_gc(struct mxc_gpio_port *port)
gc->private = port;
ct = gc->chip_types;
- ct->chip.irq_ack = irq_gc_ack,
+ ct->chip.irq_ack = irq_gc_ack_set_bit;
ct->chip.irq_mask = irq_gc_mask_clr_bit;
ct->chip.irq_unmask = irq_gc_mask_set_bit;
ct->chip.irq_set_type = gpio_set_irq_type;
- ct->chip.irq_set_wake = gpio_set_wake_irq,
+ ct->chip.irq_set_wake = gpio_set_wake_irq;
ct->regs.ack = GPIO_ISR;
ct->regs.mask = GPIO_IMR;
diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c
index d8cafba8c829..af55a8577c2e 100644
--- a/drivers/gpio/gpio-mxs.c
+++ b/drivers/gpio/gpio-mxs.c
@@ -156,11 +156,11 @@ static void __init mxs_gpio_init_gc(struct mxs_gpio_port *port)
gc->private = port;
ct = gc->chip_types;
- ct->chip.irq_ack = irq_gc_ack,
+ ct->chip.irq_ack = irq_gc_ack_set_bit;
ct->chip.irq_mask = irq_gc_mask_clr_bit;
ct->chip.irq_unmask = irq_gc_mask_set_bit;
ct->chip.irq_set_type = mxs_gpio_set_irq_type;
- ct->chip.irq_set_wake = mxs_gpio_set_wake_irq,
+ ct->chip.irq_set_wake = mxs_gpio_set_wake_irq;
ct->regs.ack = PINCTRL_IRQSTAT(port->id) + MXS_CLR;
ct->regs.mask = PINCTRL_IRQEN(port->id);
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