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authorStanimir Varbanov <stanimir.varbanov@linaro.org>2016-04-11 11:38:39 +0300
committerVinod Koul <vinod.koul@intel.com>2016-04-19 21:11:31 +0530
commitf89117c0f54c235c149d31174d1dd855e04765b8 (patch)
treec5eb4b49b9fbb7651b593bd43a96f5d4678622bd /drivers/dma/qcom
parentf139f97878039f9a49db6cb555d95f6b6e9ba0f8 (diff)
downloadblackbird-op-linux-f89117c0f54c235c149d31174d1dd855e04765b8.tar.gz
blackbird-op-linux-f89117c0f54c235c149d31174d1dd855e04765b8.zip
dmaengine: qcom: bam_dma: clear BAM interrupt only if it is raised
Currently we write BAM_IRQ_CLR register with zero even when no BAM_IRQ occured. This write has some bad side effects when the BAM instance is for the crypto engine. In case of crypto engine some of the BAM registers are xPU protected and they cannot be controlled by the driver. Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Tested-by: Pramod Gurav <gpramod@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/qcom')
-rw-r--r--drivers/dma/qcom/bam_dma.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/drivers/dma/qcom/bam_dma.c b/drivers/dma/qcom/bam_dma.c
index a486bc0f82e0..789d5f836bf7 100644
--- a/drivers/dma/qcom/bam_dma.c
+++ b/drivers/dma/qcom/bam_dma.c
@@ -801,13 +801,17 @@ static irqreturn_t bam_dma_irq(int irq, void *data)
if (srcs & P_IRQ)
tasklet_schedule(&bdev->task);
- if (srcs & BAM_IRQ)
+ if (srcs & BAM_IRQ) {
clr_mask = readl_relaxed(bam_addr(bdev, 0, BAM_IRQ_STTS));
- /* don't allow reorder of the various accesses to the BAM registers */
- mb();
+ /*
+ * don't allow reorder of the various accesses to the BAM
+ * registers
+ */
+ mb();
- writel_relaxed(clr_mask, bam_addr(bdev, 0, BAM_IRQ_CLR));
+ writel_relaxed(clr_mask, bam_addr(bdev, 0, BAM_IRQ_CLR));
+ }
return IRQ_HANDLED;
}
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