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author | Paul Walmsley <paul.walmsley@sifive.com> | 2019-04-30 13:51:00 -0700 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2019-05-03 09:20:56 -0700 |
commit | 30b8e27e3b581a173779e52096237ed19172eaf4 (patch) | |
tree | 663babb80e015cae0fcc4f90af5aaf796eb24d20 /drivers/clk/tegra | |
parent | 7b9487a9a5c41ce0ff4f6ca74652e99541bd51c3 (diff) | |
download | blackbird-op-linux-30b8e27e3b581a173779e52096237ed19172eaf4.tar.gz blackbird-op-linux-30b8e27e3b581a173779e52096237ed19172eaf4.zip |
clk: sifive: add a driver for the SiFive FU540 PRCI IP block
Add driver code for the SiFive FU540 PRCI IP block. This IP block
handles reset and clock control for the SiFive FU540 device and
implements SoC-level clock tree controls and dividers.
Based on code written by Wesley Terpstra <wesley@sifive.com>:
https://github.com/riscv/riscv-linux/commit/999529edf517ed75b56659d456d221b2ee56bb60
Boot and PLL rate change were tested on a SiFive HiFive Unleashed
board.
This version includes several changes requested by Stephen Boyd
<sboyd@kernel.org>.
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: Wesley W. Terpstra <wesley@sifive.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Megan Wachs <megan@sifive.com>
Cc: linux-riscv@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-clk@vger.kernel.org
[sboyd@kernel.org: Fix some const and ARRAY_SIZE() issues, make makefile
only descend if CLK_SIFIVE=y]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/tegra')
0 files changed, 0 insertions, 0 deletions