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| author | Jiancheng Xue <xuejiancheng@hisilicon.com> | 2016-04-23 15:40:28 +0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-05-06 11:13:29 -0700 |
| commit | 25824d52caa8e614b695a7197a8edde19f5b02ad (patch) | |
| tree | 5f183fec712cdf5802e858d4112483eaf98f6ec8 /drivers/clk/hisilicon/clk.c | |
| parent | f55532a0c0b8bb6148f4e07853b876ef73bc69ca (diff) | |
| download | blackbird-op-linux-25824d52caa8e614b695a7197a8edde19f5b02ad.tar.gz blackbird-op-linux-25824d52caa8e614b695a7197a8edde19f5b02ad.zip | |
reset: hisilicon: add reset controller driver for hisilicon SOCs
In most of hisilicon SOCs, reset controller and clock provider are
combined together as a block named CRG (Clock and Reset Generator).
This patch mainly implements the reset function.
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/hisilicon/clk.c')
0 files changed, 0 insertions, 0 deletions
