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authorHirokazu Takata <takata@linux-m32r.org>2006-01-06 00:18:42 -0800
committerLinus Torvalds <torvalds@g5.osdl.org>2006-01-06 08:33:43 -0800
commit1b5b776aa5730cbda9cba84ba0f8ccd53a775797 (patch)
tree60b661ac7cceba108dd07062a54e7fb724a19e72 /arch
parent9287d95ea194abf32fab24c6909f8ea55ab0292f (diff)
downloadblackbird-op-linux-1b5b776aa5730cbda9cba84ba0f8ccd53a775797.tar.gz
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[PATCH] m32r: Update syscall macros for MMU-less targets
This patch is for updating m32r's MMU-less support. Some legacy MMU-less m32r chips cannot return from a trap handler to the right-hand side 16-bit halfword code of a 32-bit instrucion code pair, because a "trap" instruction specification was expanded in M32R-II ISA. This modification forces "trap" instructions to be placed in word alignment location with a parallel "nop" code. Signed-off-by: Kazuhiro Inaoka <inaoka@linux-m32r.org> Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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