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authorMatthew Wilcox <matthew@wil.cx>2008-02-10 23:18:15 -0500
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2008-02-11 08:15:03 -0800
commit9585ca02f8f9e844b64e7ff4d167ccc1390a99ab (patch)
treeeeb7cb866c579a5b3a2e9b8eaac47fff64b2f006 /arch/x86/mach-visws/mpparse.c
parent19af35546de68c872dcb687613e0902a602cb20e (diff)
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Use proper abstractions in quirk_intel_irqbalance
Since we may not have a pci_dev for the device we need to access, we can't use pci_read_config_word. But raw_pci_read is an internal implementation detail; it's better to use the architected pci_bus_read_config_word interface. Using PCI_DEVFN instead of a mysterious constant helps reassure everyone that we really do intend to access device 8. [ Thanks to Grant Grundler for pointing out to me that this is exactly what the write immediately above this is doing -- enabling device 8 to respond to config space cycles. - Matthew Grant also says: "Can you also add a comment which points at the Intel documentation? The 'Intel E7320 Memory Controller Hub (MCH) Datasheet' at http://download.intel.com/design/chipsets/datashts/30300702.pdf Page 69 documents register F4h (DEVPRES1). And I just doubled checked that the 0xf4 register value is restored later in the quirk (obvious when you look at the code but not from the patch" so here it is. - Linus ] Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Acked-by: Grant Grundler <grundler@parisc-linux.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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