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authorShane Wang <shane.wang@intel.com>2010-04-29 12:09:01 -0400
committerAvi Kivity <avi@redhat.com>2010-05-19 11:36:34 +0300
commitcafd66595d92591e4bd25c3904e004fc6f897e2d (patch)
tree42f38daf5d634ccf958da89de2a20937849deb92 /arch/x86/include/asm/msr-index.h
parentf1d86e469b60f9e1afed5c17a6e723c2c9c55ceb (diff)
downloadblackbird-op-linux-cafd66595d92591e4bd25c3904e004fc6f897e2d.tar.gz
blackbird-op-linux-cafd66595d92591e4bd25c3904e004fc6f897e2d.zip
KVM: VMX: enable VMXON check with SMX enabled (Intel TXT)
Per document, for feature control MSR: Bit 1 enables VMXON in SMX operation. If the bit is clear, execution of VMXON in SMX operation causes a general-protection exception. Bit 2 enables VMXON outside SMX operation. If the bit is clear, execution of VMXON outside SMX operation causes a general-protection exception. This patch is to enable this kind of check with SMX for VMXON in KVM. Signed-off-by: Shane Wang <shane.wang@intel.com> Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'arch/x86/include/asm/msr-index.h')
-rw-r--r--arch/x86/include/asm/msr-index.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index bc473acfa7f9..f9324851eba0 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -202,8 +202,9 @@
#define MSR_IA32_EBL_CR_POWERON 0x0000002a
#define MSR_IA32_FEATURE_CONTROL 0x0000003a
-#define FEATURE_CONTROL_LOCKED (1<<0)
-#define FEATURE_CONTROL_VMXON_ENABLED (1<<2)
+#define FEATURE_CONTROL_LOCKED (1<<0)
+#define FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX (1<<1)
+#define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX (1<<2)
#define MSR_IA32_APICBASE 0x0000001b
#define MSR_IA32_APICBASE_BSP (1<<8)
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