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| author | Ingo Molnar <mingo@kernel.org> | 2012-03-26 17:18:44 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2012-03-26 17:19:03 +0200 |
| commit | 7fd52392c56361a40f0c630a82b36b95ca31eac6 (patch) | |
| tree | 14091de24c6b28ea4cae9826f98aeedb7be091f5 /arch/x86/include/asm/cpufeature.h | |
| parent | b01c3a0010aabadf745f3e7fdb9cab682e0a28a2 (diff) | |
| parent | e22057c8599373e5caef0bc42bdb95d2a361ab0d (diff) | |
| download | blackbird-op-linux-7fd52392c56361a40f0c630a82b36b95ca31eac6.tar.gz blackbird-op-linux-7fd52392c56361a40f0c630a82b36b95ca31eac6.zip | |
Merge branch 'linus' into perf/urgent
Merge reason: we need to fix a non-trivial merge conflict.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/include/asm/cpufeature.h')
| -rw-r--r-- | arch/x86/include/asm/cpufeature.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index 8d67d428b0f9..340ee49961a6 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h @@ -177,6 +177,7 @@ #define X86_FEATURE_PLN (7*32+ 5) /* Intel Power Limit Notification */ #define X86_FEATURE_PTS (7*32+ 6) /* Intel Package Thermal Status */ #define X86_FEATURE_DTS (7*32+ 7) /* Digital Thermal Sensor */ +#define X86_FEATURE_HW_PSTATE (7*32+ 8) /* AMD HW-PState */ /* Virtualization flags: Linux defined, word 8 */ #define X86_FEATURE_TPR_SHADOW (8*32+ 0) /* Intel TPR Shadow */ @@ -199,10 +200,13 @@ /* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 9 */ #define X86_FEATURE_FSGSBASE (9*32+ 0) /* {RD/WR}{FS/GS}BASE instructions*/ #define X86_FEATURE_BMI1 (9*32+ 3) /* 1st group bit manipulation extensions */ +#define X86_FEATURE_HLE (9*32+ 4) /* Hardware Lock Elision */ #define X86_FEATURE_AVX2 (9*32+ 5) /* AVX2 instructions */ #define X86_FEATURE_SMEP (9*32+ 7) /* Supervisor Mode Execution Protection */ #define X86_FEATURE_BMI2 (9*32+ 8) /* 2nd group bit manipulation extensions */ #define X86_FEATURE_ERMS (9*32+ 9) /* Enhanced REP MOVSB/STOSB */ +#define X86_FEATURE_INVPCID (9*32+10) /* Invalidate Processor Context ID */ +#define X86_FEATURE_RTM (9*32+11) /* Restricted Transactional Memory */ #if defined(__KERNEL__) && !defined(__ASSEMBLY__) |
