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authorScott Wood <scottwood@freescale.com>2014-05-29 18:13:17 -0500
committerScott Wood <scottwood@freescale.com>2014-06-20 18:48:31 -0500
commit5d1bf1e2c00f71efb8286232ab1c95038405192b (patch)
treeed4c2dcbff0fff060a634f51f574398d3abfdbf3 /arch/powerpc/include/asm/reg_booke.h
parent1cb4ed92f6a5a8961b122d11e651870ba741245b (diff)
downloadblackbird-op-linux-5d1bf1e2c00f71efb8286232ab1c95038405192b.tar.gz
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powerpc/e500mc: Fix wrong value of MCSR_L2MMU_MHIT
Signed-off-by: Scott Wood <scottwood@freescale.com> Reported-by: Ed Swarthout <ed.swarthout@freescale.com>
Diffstat (limited to 'arch/powerpc/include/asm/reg_booke.h')
-rw-r--r--arch/powerpc/include/asm/reg_booke.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 464f1089b532..61482925fb52 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -260,7 +260,7 @@
/* e500mc */
#define MCSR_DCPERR_MC 0x20000000UL /* D-Cache Parity Error */
-#define MCSR_L2MMU_MHIT 0x04000000UL /* Hit on multiple TLB entries */
+#define MCSR_L2MMU_MHIT 0x08000000UL /* Hit on multiple TLB entries */
#define MCSR_NMI 0x00100000UL /* Non-Maskable Interrupt */
#define MCSR_MAV 0x00080000UL /* MCAR address valid */
#define MCSR_MEA 0x00040000UL /* MCAR is effective address */
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