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authorBalbir Singh <bsingharora@gmail.com>2017-08-30 21:45:09 +1000
committerMichael Ellerman <mpe@ellerman.id.au>2017-08-31 14:26:45 +1000
commitd1e1b351f50f9e5941f436f6c63949731979e00c (patch)
tree99ada9804a9cb0ae4967414a594890ab64b5381e /arch/powerpc/include/asm/reg.h
parent64d66aa051544c31048ca58ab0ff81f294d37e9d (diff)
downloadblackbird-op-linux-d1e1b351f50f9e5941f436f6c63949731979e00c.tar.gz
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powerpc/xmon: Add ISA v3.0 SPRs to SPR dump
Add support for printing the PIDR/TIDR for ISA 300 and PSSCR and PTCR in ISA 3.0 hypervisor mode. SPRN_PSSCR_PR is the privileged mode access and is used when we are not in hypervisor mode. Signed-off-by: Balbir Singh <bsingharora@gmail.com> [mpe: Split out of larger patch] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include/asm/reg.h')
-rw-r--r--arch/powerpc/include/asm/reg.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index c36823d64ec9..2c4366ada976 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -356,6 +356,7 @@
#define SPRN_PMSR 0x355 /* Power Management Status Reg */
#define SPRN_PMMAR 0x356 /* Power Management Memory Activity Register */
#define SPRN_PSSCR 0x357 /* Processor Stop Status and Control Register (ISA 3.0) */
+#define SPRN_PSSCR_PR 0x337 /* PSSCR ISA 3.0, privileged mode access */
#define SPRN_PMCR 0x374 /* Power Management Control Register */
/* HFSCR and FSCR bit numbers are the same */
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