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authorKleber Sacilotto de Souza <klebers@linux.vnet.ibm.com>2014-01-17 11:56:52 -0200
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2014-02-17 11:19:35 +1100
commit49d9684a54d21930372b7fb0d3d7b5617f621706 (patch)
tree6062f657d789a425af844b02cc315b9715bb5d91 /arch/powerpc/include/asm/pgtable-ppc64.h
parentb020cc6c03a37c3526fcb1dff274f649257949e0 (diff)
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powerpc/pseries: Add Gen3 definitions for PCIE link speed
Rev3 of the PCI Express Base Specification defines a Supported Link Speeds Vector where the bit definitions within this field are: Bit 0 - 2.5 GT/s Bit 1 - 5.0 GT/s Bit 2 - 8.0 GT/s This vector definition is used by the platform firmware to export the maximum and current link speeds of the PCI bus via the "ibm,pcie-link-speed-stats" device-tree property. This patch updates pseries_root_bridge_prepare() to detect Gen3 speed buses (defined by 0x04). Signed-off-by: Kleber Sacilotto de Souza <klebers@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/pgtable-ppc64.h')
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