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| author | Alexander Graf <agraf@suse.de> | 2010-07-29 14:48:04 +0200 |
|---|---|---|
| committer | Avi Kivity <avi@redhat.com> | 2010-10-24 10:50:56 +0200 |
| commit | 819a63dc792b0888edd3eda306a9e1e049dcbb1c (patch) | |
| tree | 70599dcd83eb9892785cd9e7ca5d92534bedcdd7 /arch/powerpc/include/asm/dcr-native.h | |
| parent | 92234722ed631f472f1c4d79d35d8e5cf6910002 (diff) | |
| download | blackbird-op-linux-819a63dc792b0888edd3eda306a9e1e049dcbb1c.tar.gz blackbird-op-linux-819a63dc792b0888edd3eda306a9e1e049dcbb1c.zip | |
KVM: PPC: PV mtmsrd L=1
The PowerPC ISA has a special instruction for mtmsr that only changes the EE
and RI bits, namely the L=1 form.
Since that one is reasonably often occuring and simple to implement, let's
go with this first. Writing EE=0 is always just a store. Doing EE=1 also
requires us to check for pending interrupts and if necessary exit back to the
hypervisor.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'arch/powerpc/include/asm/dcr-native.h')
0 files changed, 0 insertions, 0 deletions
