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authorchenhui zhao <chenhui.zhao@freescale.com>2012-03-14 18:15:27 +0800
committerKumar Gala <galak@kernel.crashing.org>2012-03-16 15:58:19 -0500
commitad68ee016d928975161f82619410296af8eba2e8 (patch)
treec790fa449f778bc5e096815f82c4083485e41889 /arch/powerpc/boot/mpc8xx.c
parent04e358d896a7351c6cb453bcaa62cbbe99ae6c7c (diff)
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powerpc/85xx: mpc85xxcds - Fix PCI I/O space resource of PCI bridge
There is a PCI bridge(Tsi310) between the MPC8548 and a VIA southbridge chip. The bootloader sets the PCI bridge to open a window from 0x0000 to 0x1fff on the PCI I/O space. But the kernel can't set the I/O resource. In the routine pci_read_bridge_io(), if the base which is read from PCI_IO_BASE is equal to zero, the routine don't set the I/O resource of the child bus. To allow the legacy I/O space on the VIA southbridge to be accessed, use the fixup to fix the PCI I/O space of the PCI bridge. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/mpc8xx.c')
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