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authorPaul Burton <paul.burton@imgtec.com>2014-03-24 10:19:28 +0000
committerRalf Baechle <ralf@linux-mips.org>2014-03-31 18:17:12 +0200
commitf0cff5c86f7d3be0084eedbf449c3f47638e76f2 (patch)
tree9ac9b6428ba2011c6b7d1c1ac071681b35272c3d /arch/mips
parenta809d46066d5171ed446d59a51cd1e57d99fcfc3 (diff)
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MIPS: smp-cmp: Remove incorrect core number probe
This probing is already done by decode_configs as part of cpu_probe, and furthermore the implementation here was incorrect for any MT core with a number of VPEs other than 2. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6650/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/kernel/smp-cmp.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/mips/kernel/smp-cmp.c b/arch/mips/kernel/smp-cmp.c
index 594660ed19dc..3ef55fb7ac03 100644
--- a/arch/mips/kernel/smp-cmp.c
+++ b/arch/mips/kernel/smp-cmp.c
@@ -41,7 +41,7 @@
static void cmp_init_secondary(void)
{
- struct cpuinfo_mips *c = &current_cpu_data;
+ struct cpuinfo_mips *c __maybe_unused = &current_cpu_data;
/* Assume GIC is present */
change_c0_status(ST0_IM, STATUSF_IP3 | STATUSF_IP4 | STATUSF_IP6 |
@@ -49,7 +49,6 @@ static void cmp_init_secondary(void)
/* Enable per-cpu interrupts: platform specific */
- c->core = (read_c0_ebase() >> 1) & 0x1ff;
#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC)
if (cpu_has_mipsmt)
c->vpe_id = (read_c0_tcbind() >> TCBIND_CURVPE_SHIFT) &
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