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authorIngo Molnar <mingo@elte.hu>2008-12-08 13:52:00 +0100
committerIngo Molnar <mingo@elte.hu>2008-12-08 13:52:00 +0100
commit4d117c5c6b00254e51c61ff5b506ccaba21a5a03 (patch)
treeecb9d3ee4bfd9610c459c1eb0c0357c2905f3ae4 /arch/mips
parent6c415b9234a8c71f290e5d4fddc467f103f32719 (diff)
parent43714539eab42b2fa3653ea7bd667b36c2291b11 (diff)
downloadblackbird-op-linux-4d117c5c6b00254e51c61ff5b506ccaba21a5a03.tar.gz
blackbird-op-linux-4d117c5c6b00254e51c61ff5b506ccaba21a5a03.zip
Merge branch 'sched/urgent' into sched/core
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/include/asm/bug.h29
-rw-r--r--arch/mips/include/asm/ptrace.h4
2 files changed, 20 insertions, 13 deletions
diff --git a/arch/mips/include/asm/bug.h b/arch/mips/include/asm/bug.h
index 7eb63de808bc..08ea46863fe5 100644
--- a/arch/mips/include/asm/bug.h
+++ b/arch/mips/include/asm/bug.h
@@ -7,20 +7,31 @@
#include <asm/break.h>
-#define BUG() \
-do { \
- __asm__ __volatile__("break %0" : : "i" (BRK_BUG)); \
-} while (0)
+static inline void __noreturn BUG(void)
+{
+ __asm__ __volatile__("break %0" : : "i" (BRK_BUG));
+ /* Fool GCC into thinking the function doesn't return. */
+ while (1)
+ ;
+}
#define HAVE_ARCH_BUG
#if (_MIPS_ISA > _MIPS_ISA_MIPS1)
-#define BUG_ON(condition) \
-do { \
- __asm__ __volatile__("tne $0, %0, %1" \
- : : "r" (condition), "i" (BRK_BUG)); \
-} while (0)
+static inline void __BUG_ON(unsigned long condition)
+{
+ if (__builtin_constant_p(condition)) {
+ if (condition)
+ BUG();
+ else
+ return;
+ }
+ __asm__ __volatile__("tne $0, %0, %1"
+ : : "r" (condition), "i" (BRK_BUG));
+}
+
+#define BUG_ON(C) __BUG_ON((unsigned long)(C))
#define HAVE_ARCH_BUG_ON
diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h
index 813abd16255d..c2c8bac43307 100644
--- a/arch/mips/include/asm/ptrace.h
+++ b/arch/mips/include/asm/ptrace.h
@@ -9,10 +9,6 @@
#ifndef _ASM_PTRACE_H
#define _ASM_PTRACE_H
-#ifdef CONFIG_64BIT
-#define __ARCH_WANT_COMPAT_SYS_PTRACE
-#endif
-
/* 0 - 31 are integer registers, 32 - 63 are fp registers. */
#define FPR_BASE 32
#define PC 64
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