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| author | Ralf Baechle <ralf@linux-mips.org> | 2012-01-11 15:37:16 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2012-01-11 15:37:16 +0100 |
| commit | c539ef7d355219c7b0e16cc302bf179fcad936b3 (patch) | |
| tree | 1ef75df68f3eee8c195e67ddb605afb3e778b090 /arch/mips/pnx8550/common/int.c | |
| parent | f467e4bfb50ca6af042f1b19b3556bd4aca854c3 (diff) | |
| download | blackbird-op-linux-c539ef7d355219c7b0e16cc302bf179fcad936b3.tar.gz blackbird-op-linux-c539ef7d355219c7b0e16cc302bf179fcad936b3.zip | |
MIPS: Set default pci cache line size.
On MIPS the generic PCI code has always defaulted to L1_CACHE_BYTES
because the architecutre PCI code did not provide a better default.
In particular on systems with S-caches or T-caches this was suboptimal.
Provide a better default by setting pci_dfl_cache_line_size based on
the size of the line size of the lowest level of the cache hierarchy.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2982/
Diffstat (limited to 'arch/mips/pnx8550/common/int.c')
0 files changed, 0 insertions, 0 deletions
