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| author | Johannes Berg <johannes.berg@intel.com> | 2016-10-04 09:22:19 +0200 |
|---|---|---|
| committer | Johannes Berg <johannes.berg@intel.com> | 2016-10-04 09:46:44 +0200 |
| commit | 1e1430d5282bc3a572465ef3261eea793d98a653 (patch) | |
| tree | 81c8883606ed2dd821f4509581888505d48631dd /arch/mips/mti-malta/malta-setup.c | |
| parent | bb42f2d13ffcd0baed7547b37d05add51fcd50e1 (diff) | |
| parent | 9a8dd213d2a38349e5ea2ca8888400952112b45c (diff) | |
| download | blackbird-op-linux-1e1430d5282bc3a572465ef3261eea793d98a653.tar.gz blackbird-op-linux-1e1430d5282bc3a572465ef3261eea793d98a653.zip | |
Merge remote-tracking branch 'net-next/master' into mac80211-next
Resolve the merge conflict between Felix's/my and Toke's patches
coming into the tree through net and mac80211-next respectively.
Most of Felix's changes go away due to Toke's new infrastructure
work, my patch changes to "goto begin" (the label wasn't there
before) instead of returning NULL so flow control towards drivers
is preserved better.
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Diffstat (limited to 'arch/mips/mti-malta/malta-setup.c')
| -rw-r--r-- | arch/mips/mti-malta/malta-setup.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/mips/mti-malta/malta-setup.c b/arch/mips/mti-malta/malta-setup.c index ec5b21678fad..7e7364b0501e 100644 --- a/arch/mips/mti-malta/malta-setup.c +++ b/arch/mips/mti-malta/malta-setup.c @@ -39,6 +39,9 @@ #include <linux/console.h> #endif +#define ROCIT_CONFIG_GEN0 0x1f403000 +#define ROCIT_CONFIG_GEN0_PCI_IOCU BIT(7) + extern void malta_be_init(void); extern int malta_be_handler(struct pt_regs *regs, int is_fixup); @@ -107,6 +110,8 @@ static void __init fd_activate(void) static int __init plat_enable_iocoherency(void) { int supported = 0; + u32 cfg; + if (mips_revision_sconid == MIPS_REVISION_SCON_BONITO) { if (BONITO_PCICACHECTRL & BONITO_PCICACHECTRL_CPUCOH_PRES) { BONITO_PCICACHECTRL |= BONITO_PCICACHECTRL_CPUCOH_EN; @@ -129,7 +134,8 @@ static int __init plat_enable_iocoherency(void) } else if (mips_cm_numiocu() != 0) { /* Nothing special needs to be done to enable coherency */ pr_info("CMP IOCU detected\n"); - if ((*(unsigned int *)0xbf403000 & 0x81) != 0x81) { + cfg = __raw_readl((u32 *)CKSEG1ADDR(ROCIT_CONFIG_GEN0)); + if (!(cfg & ROCIT_CONFIG_GEN0_PCI_IOCU)) { pr_crit("IOCU OPERATION DISABLED BY SWITCH - DEFAULTING TO SW IO COHERENCY\n"); return 0; } |
