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authorRalf Baechle <ralf@linux-mips.org>2009-06-22 15:48:27 +0100
committerRalf Baechle <ralf@linux-mips.org>2009-06-24 18:34:39 +0100
commitab7f6f3010a6c5ae147541168705a446cee511e7 (patch)
tree150f46e479a7d98e5ad10fe34abd2c684d94bd38 /arch/mips/mipssim
parent44eeab67416711db9b84610ef18c99a60415dff8 (diff)
downloadblackbird-op-linux-ab7f6f3010a6c5ae147541168705a446cee511e7.tar.gz
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MIPS: MIPSsim: Fix build error if MSC01E_INT_BASE is undefined.
This fixes kernel.org bugzilla 13595, see http://bugzilla.kernel.org/show_bug.cgi?id=13595 Reported-by: dvice_null@yahoo.com Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mipssim')
-rw-r--r--arch/mips/mipssim/sim_time.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/mipssim/sim_time.c b/arch/mips/mipssim/sim_time.c
index 881ecbc1fa23..0cea932f1241 100644
--- a/arch/mips/mipssim/sim_time.c
+++ b/arch/mips/mipssim/sim_time.c
@@ -91,6 +91,7 @@ unsigned __cpuinit get_c0_compare_int(void)
mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
} else {
#endif
+ {
if (cpu_has_vint)
set_vi_handler(cp0_compare_irq, mips_timer_dispatch);
mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
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