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author | Maciej W. Rozycki <macro@linux-mips.org> | 2018-10-08 01:37:07 +0100 |
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committer | Paul Burton <paul.burton@mips.com> | 2018-10-09 10:42:40 -0700 |
commit | a711d43cbbaa4800a15885c1044348982b6c0c4b (patch) | |
tree | c65c1fb975a5ac4e84cdc780c97de3c3f5e6ab9a /arch/mips/loongson64/loongson-3 | |
parent | 4ae0452bddca8b59e9258759123a652161d07871 (diff) | |
download | blackbird-op-linux-a711d43cbbaa4800a15885c1044348982b6c0c4b.tar.gz blackbird-op-linux-a711d43cbbaa4800a15885c1044348982b6c0c4b.zip |
MIPS: Correct `mmiowb' barrier for `wbflush' platforms
Redefine `mmiowb' in terms of `iobarrier_w' so that it works correctly
for MIPS I platforms, which have no SYNC machine instruction and use a
call to `wbflush' instead.
This doesn't change the semantics for CONFIG_CPU_CAVIUM_OCTEON, because
`iobarrier_w' expands to `wmb', which is ultimately the same as the
current arrangement. For MIPS I platforms this not only makes any code
that would happen to use `mmiowb' build and run, but it actually
enforces the ordering required as well, as `iobarrier_w' has it already
covered with the use of `wmb'.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/20863/
Cc: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/loongson64/loongson-3')
0 files changed, 0 insertions, 0 deletions