summaryrefslogtreecommitdiffstats
path: root/arch/mips/boot/dts
diff options
context:
space:
mode:
authorPaul Cercueil <paul@crapouillou.net>2019-07-25 18:02:05 -0400
committerPaul Burton <paul.burton@mips.com>2019-07-30 10:29:15 -0700
commit36ba3eae036242fdc36eb8e89d5001a219a7fb1d (patch)
treed87c998bea86d9777fde5f48e48924f2c777ebf4 /arch/mips/boot/dts
parentf066fa60640130eed62f628e382ad28f92d442a5 (diff)
downloadblackbird-op-linux-36ba3eae036242fdc36eb8e89d5001a219a7fb1d.tar.gz
blackbird-op-linux-36ba3eae036242fdc36eb8e89d5001a219a7fb1d.zip
MIPS: DTS: jz4740: Add missing nodes
Add nodes for the MMC, AIC, ADC, CODEC, MUSB, LCD, memory, and BCH controllers. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Paul Burton <paul.burton@mips.com>
Diffstat (limited to 'arch/mips/boot/dts')
-rw-r--r--arch/mips/boot/dts/ingenic/jz4740.dtsi84
1 files changed, 84 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi
index 3ffaf63f22dd..bceabf494af5 100644
--- a/arch/mips/boot/dts/ingenic/jz4740.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi
@@ -132,6 +132,35 @@
};
};
+ aic: audio-controller@10020000 {
+ compatible = "ingenic,jz4740-i2s";
+ reg = <0x10020000 0x38>;
+
+ #sound-dai-cells = <0>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <18>;
+
+ clocks = <&cgu JZ4740_CLK_AIC>,
+ <&cgu JZ4740_CLK_I2S>,
+ <&cgu JZ4740_CLK_EXT>,
+ <&cgu JZ4740_CLK_PLL_HALF>;
+ clock-names = "aic", "i2s", "ext", "pll half";
+
+ dmas = <&dmac 25 0xffffffff>, <&dmac 24 0xffffffff>;
+ dma-names = "rx", "tx";
+ };
+
+ codec: audio-codec@100200a4 {
+ compatible = "ingenic,jz4740-codec";
+ reg = <0x10020080 0x8>;
+
+ #sound-dai-cells = <0>;
+
+ clocks = <&cgu JZ4740_CLK_AIC>;
+ clock-names = "aic";
+ };
+
mmc: mmc@10021000 {
compatible = "ingenic,jz4740-mmc";
reg = <0x10021000 0x1000>;
@@ -172,6 +201,38 @@
clock-names = "baud", "module";
};
+ adc: adc@10070000 {
+ compatible = "ingenic,jz4740-adc";
+ reg = <0x10070000 0x30>;
+ #io-channel-cells = <1>;
+
+ clocks = <&cgu JZ4740_CLK_ADC>;
+ clock-names = "adc";
+
+ interrupt-parent = <&intc>;
+ interrupts = <12>;
+ };
+
+ nemc: memory-controller@13010000 {
+ compatible = "ingenic,jz4740-nemc";
+ reg = <0x13010000 0x54>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <1 0 0x18000000 0x4000000
+ 2 0 0x14000000 0x4000000
+ 3 0 0x0c000000 0x4000000
+ 4 0 0x08000000 0x4000000>;
+
+ clocks = <&cgu JZ4740_CLK_MCLK>;
+ };
+
+ ecc: ecc-controller@13010100 {
+ compatible = "ingenic,jz4740-ecc";
+ reg = <0x13010100 0x2C>;
+
+ clocks = <&cgu JZ4740_CLK_MCLK>;
+ };
+
dmac: dma-controller@13020000 {
compatible = "ingenic,jz4740-dma";
reg = <0x13020000 0xbc
@@ -197,4 +258,27 @@
status = "disabled";
};
+
+ udc: usb@13040000 {
+ compatible = "ingenic,jz4740-musb";
+ reg = <0x13040000 0x10000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <24>;
+ interrupt-names = "mc";
+
+ clocks = <&cgu JZ4740_CLK_UDC>;
+ clock-names = "udc";
+ };
+
+ lcd: lcd-controller@13050000 {
+ compatible = "ingenic,jz4740-lcd";
+ reg = <0x13050000 0x1000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <30>;
+
+ clocks = <&cgu JZ4740_CLK_LCD_PCLK>, <&cgu JZ4740_CLK_LCD>;
+ clock-names = "lcd_pclk", "lcd";
+ };
};
OpenPOWER on IntegriCloud