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author | 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> | 2020-01-15 01:03:47 +0800 |
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committer | Paul Burton <paulburton@kernel.org> | 2020-01-15 10:45:45 -0800 |
commit | 0ba96b344a7fbc6750459ba3b619053850867a2c (patch) | |
tree | bf536847b3eb4ed5bb46ef367db74bc148bfa6e6 /arch/mips/boot/dts | |
parent | ad1df95419cc46b4a832cbb537716e3da9a98881 (diff) | |
download | blackbird-op-linux-0ba96b344a7fbc6750459ba3b619053850867a2c.tar.gz blackbird-op-linux-0ba96b344a7fbc6750459ba3b619053850867a2c.zip |
MIPS: Ingenic: Add missing nodes for X1000 and CU1000-Neo.
Add I2C0/I2C1/I2C2 nodes for X1000 and add I2C0, ADS7830,
MSC1, AP6212A, wlan_pwrseq nodes for CU1000-Neo.
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: robh+dt@kernel.org
Cc: paul.burton@mips.com
Cc: jhogan@kernel.org
Cc: mark.rutland@arm.com
Cc: syq@debian.org
Cc: ralf@linux-mips.org
Cc: rick.tyliu@ingenic.com
Cc: jason@lakedaemon.net
Cc: keescook@chromium.org
Cc: geert+renesas@glider.be
Cc: krzk@kernel.org
Cc: paul@crapouillou.net
Cc: prasannatsmkumar@gmail.com
Cc: sernia.zhou@foxmail.com
Cc: zhenwenjin@gmail.com
Cc: ebiederm@xmission.com
Diffstat (limited to 'arch/mips/boot/dts')
-rw-r--r-- | arch/mips/boot/dts/ingenic/cu1000-neo.dts | 71 | ||||
-rw-r--r-- | arch/mips/boot/dts/ingenic/x1000.dtsi | 45 |
2 files changed, 116 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/ingenic/cu1000-neo.dts b/arch/mips/boot/dts/ingenic/cu1000-neo.dts index b0733da9b8d3..03abd94acd84 100644 --- a/arch/mips/boot/dts/ingenic/cu1000-neo.dts +++ b/arch/mips/boot/dts/ingenic/cu1000-neo.dts @@ -4,6 +4,7 @@ #include "x1000.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clock/ingenic,tcu.h> +#include <dt-bindings/interrupt-controller/irq.h> / { compatible = "yna,cu1000-neo", "ingenic,x1000"; @@ -21,6 +22,22 @@ device_type = "memory"; reg = <0x0 0x04000000>; }; + + wlan_pwrseq: msc1-pwrseq { + compatible = "mmc-pwrseq-simple"; + + clocks = <&lpoclk>; + clock-names = "ext_clock"; + + reset-gpios = <&gpc 17 GPIO_ACTIVE_LOW>; + post-power-on-delay-ms = <200>; + + lpoclk: ap6212a { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + }; }; &exclk { @@ -36,6 +53,20 @@ ingenic,pwm-channels-mask = <0xfa>; }; +&i2c0 { + status = "okay"; + + clock-frequency = <400000>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_i2c0>; + + ads7830@48 { + compatible = "ti,ads7830"; + reg = <0x48>; + }; +}; + &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pins_uart2>; @@ -78,7 +109,41 @@ status = "okay"; }; +&msc1 { + bus-width = <4>; + max-frequency = <50000000>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_msc1>; + + #address-cells = <1>; + #size-cells = <0>; + + non-removable; + + mmc-pwrseq = <&wlan_pwrseq>; + + status = "okay"; + + ap6212a: wifi@1 { + compatible = "brcm,bcm4329-fmac"; + reg = <1>; + + interrupt-parent = <&gpc>; + interrupts = <16 IRQ_TYPE_EDGE_FALLING>; + interrupt-names = "host-wake"; + + brcm,drive-strength = <10>; + }; +}; + &pinctrl { + pins_i2c0: i2c0 { + function = "i2c0"; + groups = "i2c0-data"; + bias-disable; + }; + pins_uart2: uart2 { function = "uart2"; groups = "uart2-data-d"; @@ -96,4 +161,10 @@ groups = "mmc0-1bit", "mmc0-4bit", "mmc0-8bit"; bias-disable; }; + + pins_msc1: msc1 { + function = "mmc1"; + groups = "mmc1-1bit", "mmc1-4bit"; + bias-disable; + }; }; diff --git a/arch/mips/boot/dts/ingenic/x1000.dtsi b/arch/mips/boot/dts/ingenic/x1000.dtsi index 61061a4be3cb..4994c695a1a7 100644 --- a/arch/mips/boot/dts/ingenic/x1000.dtsi +++ b/arch/mips/boot/dts/ingenic/x1000.dtsi @@ -155,6 +155,51 @@ }; }; + i2c0: i2c-controller@10050000 { + compatible = "ingenic,x1000-i2c"; + reg = <0x10050000 0x1000>; + + #address-cells = <1>; + #size-cells = <0>; + + interrupt-parent = <&intc>; + interrupts = <60>; + + clocks = <&cgu X1000_CLK_I2C0>; + + status = "disabled"; + }; + + i2c1: i2c-controller@10051000 { + compatible = "ingenic,x1000-i2c"; + reg = <0x10051000 0x1000>; + + #address-cells = <1>; + #size-cells = <0>; + + interrupt-parent = <&intc>; + interrupts = <59>; + + clocks = <&cgu X1000_CLK_I2C1>; + + status = "disabled"; + }; + + i2c2: i2c-controller@10052000 { + compatible = "ingenic,x1000-i2c"; + reg = <0x10052000 0x1000>; + + #address-cells = <1>; + #size-cells = <0>; + + interrupt-parent = <&intc>; + interrupts = <58>; + + clocks = <&cgu X1000_CLK_I2C2>; + + status = "disabled"; + }; + uart0: serial@10030000 { compatible = "ingenic,x1000-uart"; reg = <0x10030000 0x100>; |