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author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2017-01-15 23:20:28 +0100 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2017-01-19 10:36:25 +0100 |
commit | b27e36482c02a94194fec71fb29696f4c8e9241c (patch) | |
tree | 3d7922f8a64fa4cd74e0aab1605018b1b19ea7ba /arch/h8300/mm | |
parent | 581d3c2025632f838fb08e5160dab752b3a1f527 (diff) | |
download | blackbird-op-linux-b27e36482c02a94194fec71fb29696f4c8e9241c.tar.gz blackbird-op-linux-b27e36482c02a94194fec71fb29696f4c8e9241c.zip |
pinctrl: meson: fix uart_ao_b for GXBB and GXL/GXM
The GXBB and GXL/GXM pinctrl drivers had a configuration which conflicts
with uart_ao_a. According to the GXBB ("S905") datasheet the AO UART
functions are:
- GPIOAO_0: Func1 = UART_TX_AO_A (bit 12), Func2 = UART_TX_AO_B (bit 26)
- GPIOAO_1: Func1 = UART_RX_AO_A (bit 11), Func2 = UART_RX_AO_B (bit 25)
- GPIOAO_4: Func2 = UART_TX_AO_B (bit 24)
- GPIOAO_5: Func2 = UART_RX_AO_B (bit 25)
The existing definition for uart_AO_A already uses GPIOAO_0 and GPIOAO_1.
The old definition of uart_AO_B however was broken, as it used GPIOAO_0
for TX (which would be fine) and two pins (GPIOAO_1 and GPIOAO_5) for RX
(which does not make any sense).
This fixes the uart_AO_B configuration by moving it to GPIOAO_4 and
GPIOAO_5 (it would be possible to use GPIOAO_0 and GPIOAO_1 in theory,
but all existing hardware uses uart_AO_A there).
The fix for GXBB and GXL/GXM is identical since it seems that these
specific pins are identical on both SoC variants.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/h8300/mm')
0 files changed, 0 insertions, 0 deletions