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| author | Mike Frysinger <vapier.adi@gmail.com> | 2008-08-14 15:15:43 +0800 |
|---|---|---|
| committer | Bryan Wu <cooloney@kernel.org> | 2008-08-14 15:15:43 +0800 |
| commit | 7e1e7aed0ca082b4e76567ee7ea13993b476e66a (patch) | |
| tree | 8d294d0b5f838e52f708b6bba622acdf2231c755 /arch/blackfin/mach-bf537 | |
| parent | 95a86b5e51139a199d081b6b108e761966d914ef (diff) | |
| download | blackbird-op-linux-7e1e7aed0ca082b4e76567ee7ea13993b476e66a.tar.gz blackbird-op-linux-7e1e7aed0ca082b4e76567ee7ea13993b476e66a.zip | |
Blackfin arch: do not muck with the UART during boot -- let the serial driver worry about it
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf537')
| -rw-r--r-- | arch/blackfin/mach-bf537/head.S | 50 |
1 files changed, 0 insertions, 50 deletions
diff --git a/arch/blackfin/mach-bf537/head.S b/arch/blackfin/mach-bf537/head.S index ba81b779511d..64e0287ab266 100644 --- a/arch/blackfin/mach-bf537/head.S +++ b/arch/blackfin/mach-bf537/head.S @@ -35,56 +35,6 @@ #include <asm/mach/mem_init.h> #endif -.extern _bf53x_relocate_l1_mem - -__INIT - -ENTRY(_mach_early_start) - /* Initialise General-Purpose I/O Modules on BF537 */ - p0.h = hi(BFIN_PORT_MUX); - p0.l = lo(BFIN_PORT_MUX); - R0 = (PGDE_UART | PFTE_UART)(Z); - W[P0] = R0.L; /* Enable both UARTS */ - SSYNC; - - /* Enable peripheral function of PORTF for UART0 and UART1 */ - p0.h = hi(PORTF_FER); - p0.l = lo(PORTF_FER); - R0 = 0x000F(Z); - W[P0] = R0.L; - SSYNC; - - /* Initialise UART - when booting from u-boot, the UART is not disabled - * so if we dont initalize here, our serial console gets hosed */ - p0.h = hi(BFIN_UART_LCR); - p0.l = lo(BFIN_UART_LCR); - r0 = 0x0(Z); - w[p0] = r0.L; /* To enable DLL writes */ - ssync; - - p0.h = hi(BFIN_UART_DLL); - p0.l = lo(BFIN_UART_DLL); - r0 = 0x0(Z); - w[p0] = r0.L; - ssync; - - p0.h = hi(BFIN_UART_DLH); - p0.l = lo(BFIN_UART_DLH); - r0 = 0x00(Z); - w[p0] = r0.L; - ssync; - - p0.h = hi(BFIN_UART_GCTL); - p0.l = lo(BFIN_UART_GCTL); - r0 = 0x0(Z); - w[p0] = r0.L; /* To enable UART clock */ - ssync; - - rts; -ENDPROC(_mach_early_start) - -__FINIT - .section .l1.text #ifdef CONFIG_BFIN_KERNEL_CLOCK ENTRY(_start_dma_code) |
