Merge tag 'arch-removal' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic

Pul removal of obsolete architecture ports from Arnd Bergmann:
 "This removes the entire architecture code for blackfin, cris, frv,
  m32r, metag, mn10300, score, and tile, including the associated device
  drivers.

  I have been working with the (former) maintainers for each one to
  ensure that my interpretation was right and the code is definitely
  unused in mainline kernels. Many had fond memories of working on the
  respective ports to start with and getting them included in upstream,
  but also saw no point in keeping the port alive without any users.

  In the end, it seems that while the eight architectures are extremely
  different, they all suffered the same fate: There was one company in
  charge of an SoC line, a CPU microarchitecture and a software
  ecosystem, which was more costly than licensing newer off-the-shelf
  CPU cores from a third party (typically ARM, MIPS, or RISC-V). It
  seems that all the SoC product lines are still around, but have not
  used the custom CPU architectures for several years at this point. In
  contrast, CPU instruction sets that remain popular and have actively
  maintained kernel ports tend to all be used across multiple licensees.

  [ See the new nds32 port merged in the previous commit for the next
    generation of "one company in charge of an SoC line, a CPU
    microarchitecture and a software ecosystem"   - Linus ]

  The removal came out of a discussion that is now documented at
  https://lwn.net/Articles/748074/. Unlike the original plans, I'm not
  marking any ports as deprecated but remove them all at once after I
  made sure that they are all unused. Some architectures (notably tile,
  mn10300, and blackfin) are still being shipped in products with old
  kernels, but those products will never be updated to newer kernel
  releases.

  After this series, we still have a few architectures without mainline
  gcc support:

   - unicore32 and hexagon both have very outdated gcc releases, but the
     maintainers promised to work on providing something newer. At least
     in case of hexagon, this will only be llvm, not gcc.

   - openrisc, risc-v and nds32 are still in the process of finishing
     their support or getting it added to mainline gcc in the first
     place. They all have patched gcc-7.3 ports that work to some
     degree, but complete upstream support won't happen before gcc-8.1.
     Csky posted their first kernel patch set last week, their situation
     will be similar

  [ Palmer Dabbelt points out that RISC-V support is in mainline gcc
    since gcc-7, although gcc-7.3.0 is the recommended minimum  - Linus ]"

This really says it all:

 2498 files changed, 95 insertions(+), 467668 deletions(-)

* tag 'arch-removal' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: (74 commits)
  MAINTAINERS: UNICORE32: Change email account
  staging: iio: remove iio-trig-bfin-timer driver
  tty: hvc: remove tile driver
  tty: remove bfin_jtag_comm and hvc_bfin_jtag drivers
  serial: remove tile uart driver
  serial: remove m32r_sio driver
  serial: remove blackfin drivers
  serial: remove cris/etrax uart drivers
  usb: Remove Blackfin references in USB support
  usb: isp1362: remove blackfin arch glue
  usb: musb: remove blackfin port
  usb: host: remove tilegx platform glue
  pwm: remove pwm-bfin driver
  i2c: remove bfin-twi driver
  spi: remove blackfin related host drivers
  watchdog: remove bfin_wdt driver
  can: remove bfin_can driver
  mmc: remove bfin_sdh driver
  input: misc: remove blackfin rotary driver
  input: keyboard: remove bf54x driver
  ...

1 files changed, 0 insertions, 138 deletions

diff --git a/arch/blackfin/mach-bf533/include/mach/bf533.h b/arch/blackfin/mach-bf533/include/mach/bf533.h
deleted file mode 100644
index e3e05f8f7af9..000000000000
--- a/arch/blackfin/mach-bf533/include/mach/bf533.h
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * SYSTEM MMR REGISTER AND MEMORY MAP FOR ADSP-BF561
- *
- * Copyright 2005-2008 Analog Devices Inc.
- *
- * Licensed under the GPL-2 or later.
- */
-
-#ifndef __MACH_BF533_H__
-#define __MACH_BF533_H__
-
-#define OFFSET_(x) ((x) & 0x0000FFFF)
-
-/*some misc defines*/
-#define IMASK_IVG15		0x8000
-#define IMASK_IVG14		0x4000
-#define IMASK_IVG13		0x2000
-#define IMASK_IVG12		0x1000
-
-#define IMASK_IVG11		0x0800
-#define IMASK_IVG10		0x0400
-#define IMASK_IVG9		0x0200
-#define IMASK_IVG8		0x0100
-
-#define IMASK_IVG7		0x0080
-#define IMASK_IVGTMR		0x0040
-#define IMASK_IVGHW		0x0020
-
-/***************************/
-
-
-#define BFIN_DSUBBANKS	4
-#define BFIN_DWAYS		2
-#define BFIN_DLINES		64
-#define BFIN_ISUBBANKS	4
-#define BFIN_IWAYS		4
-#define BFIN_ILINES		32
-
-#define WAY0_L			0x1
-#define WAY1_L			0x2
-#define WAY01_L			0x3
-#define WAY2_L			0x4
-#define WAY02_L			0x5
-#define	WAY12_L			0x6
-#define	WAY012_L		0x7
-
-#define	WAY3_L			0x8
-#define	WAY03_L			0x9
-#define	WAY13_L			0xA
-#define	WAY013_L		0xB
-
-#define	WAY32_L			0xC
-#define	WAY320_L		0xD
-#define	WAY321_L		0xE
-#define	WAYALL_L		0xF
-
-#define DMC_ENABLE (2<<2)	/*yes, 2, not 1 */
-
-/* IAR0 BIT FIELDS*/
-#define RTC_ERROR_BIT			0x0FFFFFFF
-#define UART_ERROR_BIT			0xF0FFFFFF
-#define SPORT1_ERROR_BIT		0xFF0FFFFF
-#define SPI_ERROR_BIT			0xFFF0FFFF
-#define SPORT0_ERROR_BIT		0xFFFF0FFF
-#define PPI_ERROR_BIT			0xFFFFF0FF
-#define DMA_ERROR_BIT			0xFFFFFF0F
-#define PLLWAKE_ERROR_BIT		0xFFFFFFFF
-
-/* IAR1 BIT FIELDS*/
-#define DMA7_UARTTX_BIT			0x0FFFFFFF
-#define DMA6_UARTRX_BIT			0xF0FFFFFF
-#define DMA5_SPI_BIT			0xFF0FFFFF
-#define DMA4_SPORT1TX_BIT		0xFFF0FFFF
-#define DMA3_SPORT1RX_BIT		0xFFFF0FFF
-#define DMA2_SPORT0TX_BIT		0xFFFFF0FF
-#define DMA1_SPORT0RX_BIT		0xFFFFFF0F
-#define DMA0_PPI_BIT			0xFFFFFFFF
-
-/* IAR2 BIT FIELDS*/
-#define WDTIMER_BIT			0x0FFFFFFF
-#define MEMDMA1_BIT			0xF0FFFFFF
-#define MEMDMA0_BIT			0xFF0FFFFF
-#define PFB_BIT				0xFFF0FFFF
-#define PFA_BIT				0xFFFF0FFF
-#define TIMER2_BIT			0xFFFFF0FF
-#define TIMER1_BIT			0xFFFFFF0F
-#define TIMER0_BIT		        0xFFFFFFFF
-
-/********************************* EBIU Settings ************************************/
-#define AMBCTL0VAL	((CONFIG_BANK_1 << 16) | CONFIG_BANK_0)
-#define AMBCTL1VAL	((CONFIG_BANK_3 << 16) | CONFIG_BANK_2)
-
-#ifdef CONFIG_C_AMBEN_ALL
-#define V_AMBEN AMBEN_ALL
-#endif
-#ifdef CONFIG_C_AMBEN
-#define V_AMBEN 0x0
-#endif
-#ifdef CONFIG_C_AMBEN_B0
-#define V_AMBEN AMBEN_B0
-#endif
-#ifdef CONFIG_C_AMBEN_B0_B1
-#define V_AMBEN AMBEN_B0_B1
-#endif
-#ifdef CONFIG_C_AMBEN_B0_B1_B2
-#define V_AMBEN AMBEN_B0_B1_B2
-#endif
-#ifdef CONFIG_C_AMCKEN
-#define V_AMCKEN AMCKEN
-#else
-#define V_AMCKEN 0x0
-#endif
-#ifdef CONFIG_C_CDPRIO
-#define V_CDPRIO 0x100
-#else
-#define V_CDPRIO 0x0
-#endif
-
-#define AMGCTLVAL	(V_AMBEN | V_AMCKEN | V_CDPRIO)
-
-#ifdef CONFIG_BF533
-#define CPU "BF533"
-#define CPUID 0x27a5
-#endif
-#ifdef CONFIG_BF532
-#define CPU "BF532"
-#define CPUID 0x27a5
-#endif
-#ifdef CONFIG_BF531
-#define CPU "BF531"
-#define CPUID 0x27a5
-#endif
-
-#ifndef CPU
-#error "Unknown CPU type - This kernel doesn't seem to be configured properly"
-#endif
-
-#endif				/* __MACH_BF533_H__  */