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authorJon Medhurst <tixy@yxit.co.uk>2011-07-03 14:26:16 +0100
committerTixy <tixy@medhuaa1.miniserver.com>2011-07-13 17:32:46 +0000
commitdd212bd3cbd337f8f3bd6b30929bef5a8c8ba81b (patch)
treefea20f88c887778bf0738b00ea3da09adb86a46d /arch/arm
parentb48354d3584e93284fba2ee99f6f9f44d18e4f83 (diff)
downloadblackbird-op-linux-dd212bd3cbd337f8f3bd6b30929bef5a8c8ba81b.tar.gz
blackbird-op-linux-dd212bd3cbd337f8f3bd6b30929bef5a8c8ba81b.zip
ARM: kprobes: Decode 32-bit Thumb table branch instructions
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/kernel/kprobes-thumb.c25
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/kernel/kprobes-thumb.c b/arch/arm/kernel/kprobes-thumb.c
index 299dc3a33ad2..dfaea25c6069 100644
--- a/arch/arm/kernel/kprobes-thumb.c
+++ b/arch/arm/kernel/kprobes-thumb.c
@@ -37,6 +37,26 @@ static inline unsigned long __kprobes thumb_probe_pc(struct kprobe *p)
return (unsigned long)p->addr - 1 + 4;
}
+static void __kprobes
+t32_simulate_table_branch(struct kprobe *p, struct pt_regs *regs)
+{
+ kprobe_opcode_t insn = p->opcode;
+ unsigned long pc = thumb_probe_pc(p);
+ int rn = (insn >> 16) & 0xf;
+ int rm = insn & 0xf;
+
+ unsigned long rnv = (rn == 15) ? pc : regs->uregs[rn];
+ unsigned long rmv = regs->uregs[rm];
+ unsigned int halfwords;
+
+ if (insn & 0x10)
+ halfwords = ((u16 *)rnv)[rmv];
+ else
+ halfwords = ((u8 *)rnv)[rmv];
+
+ regs->ARM_pc = pc + 2 * halfwords;
+}
+
static enum kprobe_insn __kprobes
t32_decode_ldmstm(kprobe_opcode_t insn, struct arch_specific_insn *asi)
{
@@ -117,6 +137,11 @@ static const union decode_item t32_table_1110_100x_x1xx[] = {
DECODE_EMULATEX (0xff400000, 0xe9400000, t32_emulate_ldrdstrd,
REGS(NOPCWB, NOSPPC, NOSPPC, 0, 0)),
+ /* TBB 1110 1000 1101 xxxx xxxx xxxx 0000 xxxx */
+ /* TBH 1110 1000 1101 xxxx xxxx xxxx 0001 xxxx */
+ DECODE_SIMULATEX(0xfff000e0, 0xe8d00000, t32_simulate_table_branch,
+ REGS(NOSP, 0, 0, 0, NOSPPC)),
+
/* STREX 1110 1000 0100 xxxx xxxx xxxx xxxx xxxx */
/* LDREX 1110 1000 0101 xxxx xxxx xxxx xxxx xxxx */
/* STREXB 1110 1000 1100 xxxx xxxx xxxx 0100 xxxx */
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