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authorMark Rutland <mark.rutland@arm.com>2014-11-18 12:16:30 +0000
committerMark Rutland <mark.rutland@arm.com>2015-01-15 12:24:22 +0000
commit60a1f02c9e91e0796b54e83b14fb8a07f7a568b6 (patch)
treee830e324106f707c0b51a048336e3cfea5cbc640 /arch/arm64/include/asm/esr.h
parentaed40e0144bdbdadb45f2b623e07aa3157eb74c9 (diff)
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arm64: decode ESR_ELx.EC when reporting exceptions
To aid the developer when something triggers an unexpected exception, decode the ESR_ELx.EC field when logging an ESR_ELx value. This doesn't tell the developer the specifics of the exception encoded in the remaining IL and ISS bits, but it can be helpful to distinguish between exception classes (e.g. SError and a data abort) without having to manually decode the field, which can be tiresome. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/esr.h')
-rw-r--r--arch/arm64/include/asm/esr.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h
index 0fd1b0e15ea8..c315543d50f9 100644
--- a/arch/arm64/include/asm/esr.h
+++ b/arch/arm64/include/asm/esr.h
@@ -133,4 +133,10 @@
#define ESR_ELx_COND_MASK (UL(0xF) << ESR_ELx_COND_SHIFT)
#define ESR_ELx_WFx_ISS_WFE (UL(1) << 0)
+#ifndef __ASSEMBLY__
+#include <asm/types.h>
+
+const char *esr_get_class_string(u32 esr);
+#endif /* __ASSEMBLY */
+
#endif /* __ASM_ESR_H */
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