Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM 64-bit DT updates from Olof Johansson:
 "Device-tree updates for arm64 platforms. Just as with 32-bit, a bunch
  of smaller changes, but also some new platforms that are worth
  mentioning:

   - Rockchip RK3399 platforms for Chromebooks, including Samsung
     Chromebook Plus (Kevin)

   - Orange Pi PC2 (Allwinner H5)

   - Freescale LS2088A and LS1088A SoCs

   - Expanded support for Nvidia Tegra186 (and Jetson TX2)"

* tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (180 commits)
  arm64: dts: Add basic DT to support Spreadtrum's SP9860G
  arm64: dts: exynos: Use - instead of @ for DT OPP entries
  arm64: dts: exynos: Add support for s6e3hf2 panel device on TM2e board
  arm64: dts: juno: add information about L1 and L2 caches
  arm64: dts: juno: fix few unit address format warnings
  arm64: marvell: dts: enable the crypto engine on the Armada 8040 DB
  arm64: marvell: dts: enable the crypto engine on the Armada 7040 DB
  arm64: marvell: dts: add crypto engine description for 7k/8k
  arm64: dts: marvell: add sdhci support for Armada 7K/8K
  arm64: dts: marvell: add eMMC support for Armada 37xx
  arm64: dts: hisi: add pinctrl dtsi file for HiKey960 development board
  arm64: dts: hisi: add drive strength levels of the pins for Hi3660 SoC
  arm64: dts: hisi: enable the NIC and SAS for the hip07-d05 board
  arm64: dts: hisi: add SAS nodes for the hip07 SoC
  arm64: dts: hisi: add RoCE nodes for the hip07 SoC
  arm64: dts: hisi: add network related nodes for the hip07 SoC
  arm64: dts: hisi: add mbigen nodes for the hip07 SoC
  arm64: dts: rockchip: fix the memory size of PX5 Evaluation board
  arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board
  dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and Poplar board
  ...

1 files changed, 9 insertions, 4 deletions

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index da881f5b6ed4..151c043b4835 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -140,7 +140,7 @@
 			     <1 10 4>;
 	};
 
-	soc {
+	soc@0 {
 		compatible = "simple-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -304,6 +304,8 @@
 			compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
 			reg = <0x5a000000 0x400>;
 			interrupts = <0 78 4>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_emmc>;
 			clocks = <&sys_clk 4>;
 			bus-width = <8>;
 			mmc-ddr-1_8v;
@@ -318,7 +320,8 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_usb0>;
 			clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>;
-			resets = <&mio_rst 7>, <&mio_rst 8>, <&mio_rst 12>, <&sys_rst 8>;
+			resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
+				 <&mio_rst 12>;
 		};
 
 		usb1: usb@5a810100 {
@@ -329,7 +332,8 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_usb1>;
 			clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>;
-			resets = <&mio_rst 7>, <&mio_rst 9>, <&mio_rst 13>, <&sys_rst 8>;
+			resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
+				 <&mio_rst 13>;
 		};
 
 		usb2: usb@5a820100 {
@@ -340,7 +344,8 @@
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_usb2>;
 			clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>;
-			resets = <&mio_rst 7>, <&mio_rst 10>, <&mio_rst 14>, <&sys_rst 8>;
+			resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,
+				 <&mio_rst 14>;
 		};
 
 		mioctrl@5b3e0000 {