summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/dpll44xx.c
diff options
context:
space:
mode:
authorMike Turquette <mturquette@linaro.org>2012-11-10 16:58:41 -0700
committerPaul Walmsley <paul@pwsan.com>2012-11-12 13:55:50 -0700
commit32cc002116b866151ca24c6e9110ba8a93754753 (patch)
tree4a7d3f08bf774ed72d37bd0de541d9dac5e3083e /arch/arm/mach-omap2/dpll44xx.c
parentf5dd3bb53ca45f3b47c6889e5920c562f5a37359 (diff)
downloadblackbird-op-linux-32cc002116b866151ca24c6e9110ba8a93754753.tar.gz
blackbird-op-linux-32cc002116b866151ca24c6e9110ba8a93754753.zip
ARM: OMAP4: clock: Convert to common clk
Convert all OMAP4 specific platform files to use COMMON clk and keep all the changes under the CONFIG_COMMON_CLK macro check so it does not break any existing code. At a later point switch to COMMON clk and get rid of all old/legacy code. This converts all apis which will be called directly from COMMON clk to take a struct clk_hw parameter, and all the internal platform apis to take a struct clk_hw_omap parameter. Changes are based off the original patch from Mike Turquette. Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: created new omap2_clksel_find_parent_index() rather than modifying omap2_init_clksel_parent(); moved clkhwops_iclk_wait to clkt_iclk.c to fix OMAP4-only builds; added clk-provider.h include to clock.h to try to fix some 3430-builds] [mturquette@ti.com: squash patch for omap2_clkops_{en,dis}able_clkdm; omap2_dflt_clk_is_enabled should not enable clocks] Signed-off-by: Mike Turquette <mturquette@ti.com> [paul@pwsan.com: fix compiler warning; update to apply; added kerneldoc on non-trivial new functions; added the dpll3xxx clockdomain modifications] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/dpll44xx.c')
-rw-r--r--arch/arm/mach-omap2/dpll44xx.c38
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c
index 5854da168a9c..aa75a3c10026 100644
--- a/arch/arm/mach-omap2/dpll44xx.c
+++ b/arch/arm/mach-omap2/dpll44xx.c
@@ -21,7 +21,11 @@
#include "cm-regbits-44xx.h"
/* Supported only on OMAP4 */
+#ifdef CONFIG_COMMON_CLK
+int omap4_dpllmx_gatectrl_read(struct clk_hw_omap *clk)
+#else
int omap4_dpllmx_gatectrl_read(struct clk *clk)
+#endif
{
u32 v;
u32 mask;
@@ -40,7 +44,11 @@ int omap4_dpllmx_gatectrl_read(struct clk *clk)
return v;
}
+#ifdef CONFIG_COMMON_CLK
+void omap4_dpllmx_allow_gatectrl(struct clk_hw_omap *clk)
+#else
void omap4_dpllmx_allow_gatectrl(struct clk *clk)
+#endif
{
u32 v;
u32 mask;
@@ -58,7 +66,11 @@ void omap4_dpllmx_allow_gatectrl(struct clk *clk)
__raw_writel(v, clk->clksel_reg);
}
+#ifdef CONFIG_COMMON_CLK
+void omap4_dpllmx_deny_gatectrl(struct clk_hw_omap *clk)
+#else
void omap4_dpllmx_deny_gatectrl(struct clk *clk)
+#endif
{
u32 v;
u32 mask;
@@ -76,10 +88,17 @@ void omap4_dpllmx_deny_gatectrl(struct clk *clk)
__raw_writel(v, clk->clksel_reg);
}
+#ifdef CONFIG_COMMON_CLK
+const struct clk_hw_omap_ops clkhwops_omap4_dpllmx = {
+ .allow_idle = omap4_dpllmx_allow_gatectrl,
+ .deny_idle = omap4_dpllmx_deny_gatectrl,
+};
+#else
const struct clkops clkops_omap4_dpllmx_ops = {
.allow_idle = omap4_dpllmx_allow_gatectrl,
.deny_idle = omap4_dpllmx_deny_gatectrl,
};
+#endif
/**
* omap4_dpll_regm4xen_recalc - compute DPLL rate, considering REGM4XEN bit
@@ -90,8 +109,15 @@ const struct clkops clkops_omap4_dpllmx_ops = {
* OMAP4 ABE DPLL. Returns the DPLL's output rate (before M-dividers)
* upon success, or 0 upon error.
*/
+#ifdef CONFIG_COMMON_CLK
+unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct clk_hw_omap *clk = to_clk_hw_omap(hw);
+#else
unsigned long omap4_dpll_regm4xen_recalc(struct clk *clk)
{
+#endif
u32 v;
unsigned long rate;
struct dpll_data *dd;
@@ -123,8 +149,16 @@ unsigned long omap4_dpll_regm4xen_recalc(struct clk *clk)
* M-dividers) upon success, -EINVAL if @clk is null or not a DPLL, or
* ~0 if an error occurred in omap2_dpll_round_rate().
*/
+#ifdef CONFIG_COMMON_CLK
+long omap4_dpll_regm4xen_round_rate(struct clk_hw *hw,
+ unsigned long target_rate,
+ unsigned long *parent_rate)
+{
+ struct clk_hw_omap *clk = to_clk_hw_omap(hw);
+#else
long omap4_dpll_regm4xen_round_rate(struct clk *clk, unsigned long target_rate)
{
+#endif
u32 v;
struct dpll_data *dd;
long r;
@@ -140,7 +174,11 @@ long omap4_dpll_regm4xen_round_rate(struct clk *clk, unsigned long target_rate)
if (v)
target_rate = target_rate / OMAP4430_REGM4XEN_MULT;
+#ifdef CONFIG_COMMON_CLK
+ r = omap2_dpll_round_rate(hw, target_rate, NULL);
+#else
r = omap2_dpll_round_rate(clk, target_rate);
+#endif
if (r == ~0)
return r;
OpenPOWER on IntegriCloud