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authorThomas Koeller <thomas.koeller@baslerweb.com>2010-05-11 17:06:49 +0200
committerKevin Hilman <khilman@deeprootsystems.com>2010-05-13 11:10:31 -0700
commit7735227e76e1660e448ec66c30e7bfd06f7cd9b7 (patch)
tree4d09334eaf615997384a5636cd22154e352f4910 /arch/arm/mach-davinci
parent0efe2b7442caaf087e56ae9b68fa5f61f4761fa8 (diff)
downloadblackbird-op-linux-7735227e76e1660e448ec66c30e7bfd06f7cd9b7.tar.gz
blackbird-op-linux-7735227e76e1660e448ec66c30e7bfd06f7cd9b7.zip
DM365: Added more PINMUX configurations for AEMIF
More complete AEMIF support for boards. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci')
-rw-r--r--arch/arm/mach-davinci/dm365.c5
-rw-r--r--arch/arm/mach-davinci/include/mach/mux.h5
2 files changed, 8 insertions, 2 deletions
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index d0d24d4e9503..a146849d78f0 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -485,11 +485,14 @@ MUX_CFG(DM365, SD1_DATA0, 4, 22, 3, 1, false)
MUX_CFG(DM365, I2C_SDA, 3, 23, 3, 2, false)
MUX_CFG(DM365, I2C_SCL, 3, 21, 3, 2, false)
-MUX_CFG(DM365, AEMIF_AR, 2, 0, 3, 1, false)
+MUX_CFG(DM365, AEMIF_AR_A14, 2, 0, 3, 1, false)
+MUX_CFG(DM365, AEMIF_AR_BA0, 2, 0, 3, 2, false)
MUX_CFG(DM365, AEMIF_A3, 2, 2, 3, 1, false)
MUX_CFG(DM365, AEMIF_A7, 2, 4, 3, 1, false)
MUX_CFG(DM365, AEMIF_D15_8, 2, 6, 1, 1, false)
MUX_CFG(DM365, AEMIF_CE0, 2, 7, 1, 0, false)
+MUX_CFG(DM365, AEMIF_CE1, 2, 8, 1, 0, false)
+MUX_CFG(DM365, AEMIF_WE_OE, 2, 9, 1, 0, false)
MUX_CFG(DM365, MCBSP0_BDX, 0, 23, 1, 1, false)
MUX_CFG(DM365, MCBSP0_X, 0, 22, 1, 1, false)
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index 07ef83bf5a1f..de11aac76a80 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -194,11 +194,14 @@ enum davinci_dm365_index {
DM365_I2C_SCL,
/* AEMIF */
- DM365_AEMIF_AR,
+ DM365_AEMIF_AR_A14,
+ DM365_AEMIF_AR_BA0,
DM365_AEMIF_A3,
DM365_AEMIF_A7,
DM365_AEMIF_D15_8,
DM365_AEMIF_CE0,
+ DM365_AEMIF_CE1,
+ DM365_AEMIF_WE_OE,
/* ASP0 function */
DM365_MCBSP0_BDX,
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