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authorOlof Johansson <olof@lixom.net>2014-09-23 22:04:19 -0700
committerOlof Johansson <olof@lixom.net>2014-09-23 22:04:19 -0700
commiteec317319ded3de245ca270a77cb83f523312575 (patch)
treeba5ba674f937a8b546836ced9185bba42f5e83a8 /arch/arm/kernel/entry-header.S
parent60f91268ee29bd2303d94e8e86be40edc0ecb92d (diff)
parent377fb3f5d9a34b2913939e0620c1c585b5913bab (diff)
downloadblackbird-op-linux-eec317319ded3de245ca270a77cb83f523312575.tar.gz
blackbird-op-linux-eec317319ded3de245ca270a77cb83f523312575.zip
Merge tag 'soc-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
SoC related changes for omaps for v3.18 merge window: - PM changes to make the code easier to use on newer SoCs - PM changes for newer SoCs suspend and resume and wake-up events - Minor clean-up to remove dead Kconfig options Note that these have a dependency to the fixes-v3.18-not-urgent tag and is based on a commit in that series. * tag 'soc-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (514 commits) ARM: OMAP5+: Reuse OMAP4 PM code for OMAP5 and DRA7 ARM: dts: OMAP3+: Add PRM interrupt ARM: omap: Remove stray ARCH_HAS_OPP references ARM: DRA7: Add hook in SoC initcalls to enable pm initialization ARM: OMAP5: Add hook in SoC initcalls to enable pm initialization ARM: OMAP5 / DRA7: Enable CPU RET on suspend ARM: OMAP5 / DRA7: PM: Provide a dummy startup function for CPU hotplug ARM: OMAP5 / DRA7: PM: Avoid all SAR saves ARM: OMAP5 / DRA7: PM: Enable Mercury retention mode on CPUx powerdomains ARM: OMAP5 / DRA7: PM / wakeupgen: Enables ES2 PM mode by default ARM: OMAP5 / DRA7: PM: Set MPUSS-EMIF clock-domain static dependency ARM: OMAP5 / DRA7: PM: Update CPU context register offset ARM: AM437x: use pdata quirks for pinctrl information ARM: DRA7: use pdata quirks for pinctrl information ARM: OMAP5: use pdata quirks for pinctrl information ARM: OMAP4+: PM: Use only valid low power state for CPU hotplug ARM: OMAP4+: PM: use only valid low power state for suspend ARM: OMAP4+: PM: Make logic state programmable ARM: OMAP2+: powerdomain: introduce logic for finding valid power domain ARM: OMAP2+: powerdomain: pwrdm_for_each_clkdm iterate only valid clkdms ...
Diffstat (limited to 'arch/arm/kernel/entry-header.S')
-rw-r--r--arch/arm/kernel/entry-header.S29
1 files changed, 15 insertions, 14 deletions
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S
index 8db307d0954b..2fdf8679b46e 100644
--- a/arch/arm/kernel/entry-header.S
+++ b/arch/arm/kernel/entry-header.S
@@ -208,26 +208,21 @@
#endif
.endif
msr spsr_cxsf, \rpsr
-#if defined(CONFIG_CPU_V6)
- ldr r0, [sp]
- strex r1, r2, [sp] @ clear the exclusive monitor
- ldmib sp, {r1 - pc}^ @ load r1 - pc, cpsr
-#elif defined(CONFIG_CPU_32v6K)
- clrex @ clear the exclusive monitor
- ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
-#else
- ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
+#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K)
+ @ We must avoid clrex due to Cortex-A15 erratum #830321
+ sub r0, sp, #4 @ uninhabited address
+ strex r1, r2, [r0] @ clear the exclusive monitor
#endif
+ ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
.endm
.macro restore_user_regs, fast = 0, offset = 0
ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
ldr lr, [sp, #\offset + S_PC]! @ get pc
msr spsr_cxsf, r1 @ save in spsr_svc
-#if defined(CONFIG_CPU_V6)
+#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K)
+ @ We must avoid clrex due to Cortex-A15 erratum #830321
strex r1, r2, [sp] @ clear the exclusive monitor
-#elif defined(CONFIG_CPU_32v6K)
- clrex @ clear the exclusive monitor
#endif
.if \fast
ldmdb sp, {r1 - lr}^ @ get calling r1 - lr
@@ -261,7 +256,10 @@
.endif
ldr lr, [sp, #S_SP] @ top of the stack
ldrd r0, r1, [sp, #S_LR] @ calling lr and pc
- clrex @ clear the exclusive monitor
+
+ @ We must avoid clrex due to Cortex-A15 erratum #830321
+ strex r2, r1, [sp, #S_LR] @ clear the exclusive monitor
+
stmdb lr!, {r0, r1, \rpsr} @ calling lr and rfe context
ldmia sp, {r0 - r12}
mov sp, lr
@@ -282,13 +280,16 @@
.endm
#else /* ifdef CONFIG_CPU_V7M */
.macro restore_user_regs, fast = 0, offset = 0
- clrex @ clear the exclusive monitor
mov r2, sp
load_user_sp_lr r2, r3, \offset + S_SP @ calling sp, lr
ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
ldr lr, [sp, #\offset + S_PC] @ get pc
add sp, sp, #\offset + S_SP
msr spsr_cxsf, r1 @ save in spsr_svc
+
+ @ We must avoid clrex due to Cortex-A15 erratum #830321
+ strex r1, r2, [sp] @ clear the exclusive monitor
+
.if \fast
ldmdb sp, {r1 - r12} @ get calling r1 - r12
.else
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