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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-05-08 15:33:30 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-05-23 18:04:51 +0100
commitbfe45e0be88d8a2e408226d473bff60da4a97d1f (patch)
tree4586e8933a35af1599f314adb73f2bae504b49b5 /arch/arm/common/timer-sp.c
parent234b6ceddb4fc2a4bc5b9a7670f070f6e69e0868 (diff)
downloadblackbird-op-linux-bfe45e0be88d8a2e408226d473bff60da4a97d1f.tar.gz
blackbird-op-linux-bfe45e0be88d8a2e408226d473bff60da4a97d1f.zip
clocksource: convert ARM 32-bit down counting clocksources
Convert SP804, MXC, Nomadik and Orion 32-bit down-counting clocksources to generic mmio clocksource infrastructure. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: Lennert Buytenhek <kernel@wantstofly.org> Acked-by: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/common/timer-sp.c')
-rw-r--r--arch/arm/common/timer-sp.c30
1 files changed, 6 insertions, 24 deletions
diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c
index 6ef3342153b9..445b05ee8511 100644
--- a/arch/arm/common/timer-sp.c
+++ b/arch/arm/common/timer-sp.c
@@ -32,35 +32,17 @@
#define TIMER_FREQ_KHZ (1000)
#define TIMER_RELOAD (TIMER_FREQ_KHZ * 1000 / HZ)
-static void __iomem *clksrc_base;
-
-static cycle_t sp804_read(struct clocksource *cs)
-{
- return ~readl(clksrc_base + TIMER_VALUE);
-}
-
-static struct clocksource clocksource_sp804 = {
- .name = "timer3",
- .rating = 200,
- .read = sp804_read,
- .mask = CLOCKSOURCE_MASK(32),
- .flags = CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
void __init sp804_clocksource_init(void __iomem *base)
{
- struct clocksource *cs = &clocksource_sp804;
-
- clksrc_base = base;
-
/* setup timer 0 as free-running clocksource */
- writel(0, clksrc_base + TIMER_CTRL);
- writel(0xffffffff, clksrc_base + TIMER_LOAD);
- writel(0xffffffff, clksrc_base + TIMER_VALUE);
+ writel(0, base + TIMER_CTRL);
+ writel(0xffffffff, base + TIMER_LOAD);
+ writel(0xffffffff, base + TIMER_VALUE);
writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
- clksrc_base + TIMER_CTRL);
+ base + TIMER_CTRL);
- clocksource_register_khz(cs, TIMER_FREQ_KHZ);
+ clocksource_mmio_init(base + TIMER_VALUE, "timer3",
+ TIMER_FREQ_KHZ * 1000, 200, 32, clocksource_mmio_readl_down);
}
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