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author | Dinh Nguyen <dinguyen@opensource.altera.com> | 2014-09-04 16:45:56 -0500 |
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committer | Dinh Nguyen <dinguyen@opensource.altera.com> | 2014-11-20 23:08:42 -0600 |
commit | 475dc86d08de4af61b6e8524bbcdbf8d675cb4fa (patch) | |
tree | 499b98442fdd1c59461e1d10f057f2836fa25ba8 /arch/arm/boot/dts/socfpga_arria10_socdk.dts | |
parent | c1ad85d77224b91448761a3f0ab0d14459c7bb44 (diff) | |
download | blackbird-op-linux-475dc86d08de4af61b6e8524bbcdbf8d675cb4fa.tar.gz blackbird-op-linux-475dc86d08de4af61b6e8524bbcdbf8d675cb4fa.zip |
arm: dts: socfpga: Add a base DTSI for Altera's Arria10 SOC
The Arria 10 is latest SOC+FPGA from the Altera SOCFPGA platform. The Arria10
SOC shares some similarities with the SOCFPGA Cyclone5 and Arria5, but there
are enough differences to warrant a new base dtsi.
The differences are:
* 3 EMAC controllers
* 5 I2C controllers
* 3 SPI controllers
* 1.5 GHZ dual A9s
* Support for DDR4
Besides the usual memory map and IRQ changes, the clock framework will be
different, so this patch just adds the fixed-clocks.
Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'arch/arm/boot/dts/socfpga_arria10_socdk.dts')
-rwxr-xr-x | arch/arm/boot/dts/socfpga_arria10_socdk.dts | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dts b/arch/arm/boot/dts/socfpga_arria10_socdk.dts new file mode 100755 index 000000000000..3015ce8d3057 --- /dev/null +++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dts @@ -0,0 +1,48 @@ +/* + * Copyright (C) 2014 Altera Corporation <www.altera.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +/dts-v1/; +#include "socfpga_arria10.dtsi" + +/ { + model = "Altera SOCFPGA Arria 10"; + compatible = "altr,socfpga-arria10", "altr,socfpga"; + + chosen { + bootargs = "console=ttyS0,115200 rootwait"; + }; + + memory { + name = "memory"; + device_type = "memory"; + reg = <0x0 0x40000000>; /* 1GB */ + }; + + soc { + clkmgr@ffd04000 { + clocks { + osc1 { + clock-frequency = <25000000>; + }; + }; + }; + + serial0@ffc02000 { + status = "okay"; + }; + }; +}; |