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| author | Olof Johansson <olof@lixom.net> | 2012-09-04 22:12:41 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2012-09-04 22:12:41 -0700 |
| commit | cd754736097fa6ce03b3543ec111f7a13a0dd2f2 (patch) | |
| tree | 0e20b4f55f588dac96d311bc0c514b8d07846d90 /Documentation | |
| parent | 242521e90e3f0a7660699761f7b42f0deaa8ea15 (diff) | |
| parent | 051f1b13144dd8553d5a5104dde94c7263ae3ba7 (diff) | |
| download | blackbird-op-linux-cd754736097fa6ce03b3543ec111f7a13a0dd2f2.tar.gz blackbird-op-linux-cd754736097fa6ce03b3543ec111f7a13a0dd2f2.zip | |
Merge tag 'arm-perf-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into next/cleanup
From Will Deacon:
Bunch of perf updates for the ARM backend that pave the way for
big.LITTLE support in the future. The separation of CPU and PMU code
is also the start of being able to move some of this stuff under
drivers/.
* tag 'arm-perf-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux:
ARM: perf: move irq registration into pmu implementation
ARM: perf: move CPU-specific PMU handling code into separate file
ARM: perf: prepare for moving CPU PMU code into separate file
ARM: perf: probe devicetree in preference to current CPU
ARM: perf: remove mysterious compiler barrier
ARM: pmu: remove arm_pmu_type enumeration
ARM: pmu: remove unused reservation mechanism
ARM: perf: add devicetree bindings for 11MPcore, A5, A7 and A15 PMUs
ARM: PMU: Add runtime PM Support
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/arm/pmu.txt | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/pmu.txt b/Documentation/devicetree/bindings/arm/pmu.txt index 1c044eb320cc..343781b9f246 100644 --- a/Documentation/devicetree/bindings/arm/pmu.txt +++ b/Documentation/devicetree/bindings/arm/pmu.txt @@ -7,8 +7,12 @@ representation in the device tree should be done as under:- Required properties: - compatible : should be one of + "arm,cortex-a15-pmu" "arm,cortex-a9-pmu" "arm,cortex-a8-pmu" + "arm,cortex-a7-pmu" + "arm,cortex-a5-pmu" + "arm,arm11mpcore-pmu" "arm,arm1176-pmu" "arm,arm1136-pmu" - interrupts : 1 combined interrupt or 1 per core. |
