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authorAnssi Hannula <anssi.hannula@bitwise.fi>2018-05-18 15:31:48 +0300
committerMarc Kleine-Budde <mkl@pengutronix.de>2018-07-27 10:40:17 +0200
commit7cb0f17f5252874ba0ecbda964e7e01587bf828e (patch)
treea95f4b75717146e1df87cd2dc1ed116a0637c1cb /Documentation/spi
parent11ee5fcd6af37b1107aa0e8980a40f8e17703c0b (diff)
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dt-bindings: can: xilinx_can: add Xilinx CAN FD bindings
Add compatible string and new attributes to support the Xilinx CAN FD core. Unlike the previously documented Xilinx CAN cores, the CAN FD core has TX mailboxes instead of TX FIFO, and optionally RX mailboxes instead of RX FIFO (selected at core generation time, not switchable at runtime). Add "tx-mailbox-count" and "rx-mailbox-count" to specify the mailbox counts instead of reusing "tx-fifo-depth" and "rx-fifo-depth". The RX FIFO depth is constant 32, but allow it to be specified via "rx-fifo-depth" to match DT usage with Zynq CAN (which has constant RX FIFO of depth of 64). v2: Remove unnecessary "rx-mode" DT property. Signed-off-by: Anssi Hannula <anssi.hannula@bitwise.fi> Cc: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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