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| author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2015-06-09 18:47:14 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2015-06-10 13:59:40 +0200 |
| commit | 9e05db29e2ac7f1fec1a4d15db8c419634290535 (patch) | |
| tree | 8906e5703d7366c8f6ffa22eb3201d4f00957289 /Documentation/devicetree | |
| parent | bfacb5669474e3e17d732eafd2f6965a7ad728ff (diff) | |
| download | blackbird-op-linux-9e05db29e2ac7f1fec1a4d15db8c419634290535.tar.gz blackbird-op-linux-9e05db29e2ac7f1fec1a4d15db8c419634290535.zip | |
pinctrl: mvebu: armada-370: align spi1 clock pin naming
Across all SoCs, even on Armada 370 for SPI0, the clock pin uses the
'sck' subname and not 'clk', so this commit adjusts the code and
documentation accordingly.
Since this commit only changes the subname, DT backward compatibility
is not affected.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree')
| -rw-r--r-- | Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt index 3a7dc0e6c94c..add7c38ec7d8 100644 --- a/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt @@ -18,7 +18,7 @@ mpp1 1 gpo, uart0(txd) mpp2 2 gpio, i2c0(sck), uart0(txd) mpp3 3 gpio, i2c0(sda), uart0(rxd) mpp4 4 gpio, vdd(cpu-pd) -mpp5 5 gpo, ge0(txclkout), uart1(txd), spi1(clk), audio(mclk) +mpp5 5 gpo, ge0(txclkout), uart1(txd), spi1(sck), audio(mclk) mpp6 6 gpio, ge0(txd0), sata0(prsnt), tdm(rst), audio(sdo) mpp7 7 gpo, ge0(txd1), tdm(dtx), audio(lrclk) mpp8 8 gpio, ge0(txd2), uart0(rts), tdm(drx), audio(bclk) |
