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author | Stephen Warren <swarren@nvidia.com> | 2013-03-28 12:11:30 -0600 |
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committer | Stephen Warren <swarren@nvidia.com> | 2013-04-04 17:17:43 -0600 |
commit | 3ec9147d4f9eeffb0f3a0439c3edd6bd01c40ed3 (patch) | |
tree | 4a487eb6216e7fc7384eb9fc273b45895628ec59 /Documentation/devicetree | |
parent | f9cd2b3bf48b108c7935fa06e833e85b5f1d0119 (diff) | |
download | blackbird-op-linux-3ec9147d4f9eeffb0f3a0439c3edd6bd01c40ed3.tar.gz blackbird-op-linux-3ec9147d4f9eeffb0f3a0439c3edd6bd01c40ed3.zip |
ARM: tegra: add clocks property to AC'97 sound nodes
Audio-related clocks need to be represented in the device tree. Update
bindings to describe which clocks are needed, and DT files to include
those clocks.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r-- | Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.txt | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.txt b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.txt index be35d34e8b26..ad589b163639 100644 --- a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.txt +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.txt @@ -2,6 +2,11 @@ NVIDIA Tegra audio complex Required properties: - compatible : "nvidia,tegra-audio-wm9712" +- clocks : Must contain an entry for each entry in clock-names. +- clock-names : Must include the following entries: + "pll_a" (The Tegra clock of that name), + "pll_a_out0" (The Tegra clock of that name), + "mclk" (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk) - nvidia,model : The user-visible name of this sound complex. - nvidia,audio-routing : A list of the connections between audio components. Each entry is a pair of strings, the first being the connection's sink, @@ -48,4 +53,7 @@ sound { "Mic", "MIC1"; nvidia,ac97-controller = <&ac97>; + + clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>; + clock-names = "pll_a", "pll_a_out0", "mclk"; }; |