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author | Andrei Pistirica <andrei.pistirica@microchip.com> | 2016-01-14 02:15:44 +0100 |
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committer | Ulf Hansson <ulf.hansson@linaro.org> | 2016-02-29 11:03:12 +0100 |
commit | d3ebd68d4d9edfbf169976edbd286436a9fc8ca8 (patch) | |
tree | 44a14bd9780211f742d9382a764027181ca2d12b /Documentation/devicetree/bindings/mmc | |
parent | 8a629d26f02351539dd1760c75656065b881cd9a (diff) | |
download | blackbird-op-linux-d3ebd68d4d9edfbf169976edbd286436a9fc8ca8.tar.gz blackbird-op-linux-d3ebd68d4d9edfbf169976edbd286436a9fc8ca8.zip |
dt/bindings: mmc: Add bindings for PIC32 SDHCI host controller
Document the devicetree bindings for the SDHCI peripheral found on
Microchip PIC32 class devices.
Signed-off-by: Andrei Pistirica <andrei.pistirica@microchip.com>
Signed-off-by: Joshua Henderson <joshua.henderson@microchip.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Diffstat (limited to 'Documentation/devicetree/bindings/mmc')
-rw-r--r-- | Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.txt | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.txt b/Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.txt new file mode 100644 index 000000000000..71ad57e050b1 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/microchip,sdhci-pic32.txt @@ -0,0 +1,29 @@ +* Microchip PIC32 SDHCI Controller + +This file documents differences between the core properties in mmc.txt +and the properties used by the sdhci-pic32 driver. + +Required properties: +- compatible: Should be "microchip,pic32mzda-sdhci" +- interrupts: Should contain interrupt +- clock-names: Should be "base_clk", "sys_clk". + See: Documentation/devicetree/bindings/resource-names.txt +- clocks: Phandle to the clock. + See: Documentation/devicetree/bindings/clock/clock-bindings.txt +- pinctrl-names: A pinctrl state names "default" must be defined. +- pinctrl-0: Phandle referencing pin configuration of the SDHCI controller. + See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt + +Example: + + sdhci@1f8ec000 { + compatible = "microchip,pic32mzda-sdhci"; + reg = <0x1f8ec000 0x100>; + interrupts = <191 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&REFCLKO4>, <&PBCLK5>; + clock-names = "base_clk", "sys_clk"; + bus-width = <4>; + cap-sd-highspeed; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdhc1>; + }; |