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authorHans de Goede <hdegoede@redhat.com>2016-07-30 16:25:47 +0200
committerUlf Hansson <ulf.hansson@linaro.org>2016-09-26 21:31:05 +0200
commitb465646ef41f2f8a397f42a956d9788e898185d7 (patch)
treeef29b400763af26873d61079bc70e95273542c08 /Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
parentf2cecb70941c8d4a9445ee85926202f7157e1222 (diff)
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mmc: sunxi: sun4i / sun5i do not have sample clocks
It turns out that sun4i (A10) and sun5i (A13 & co) do not have sample clocks, so add a new sun7i-a20-mmc compatible and do not try to use sample clocks on sun4i / sun5i. Since sun4i / sun5i do not have sample clocks, they cannot (reliably) do DDR rates, so only set MMC_CAP_1_8V_DDR when we do have sample clks. Note this patch leaves the clk_prepare_enable() / clk_disable_unprepare() calls to the sample clks as-is, without adding checks for them being NULL. All the clk_foo calls accept a NULL clk and will return success when called with a NULL clk. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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