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authorEric Brower <ebrower@nvidia.com>2013-12-19 18:08:52 -0800
committerStephen Warren <swarren@nvidia.com>2013-12-20 09:48:56 -0700
commitfd6441ec0ff9803e405df70a7cae784f2c9be204 (patch)
treed1002daa4913b676c8e8a489ff28dd7c980bded8
parentf044d6fa2345c32d32cff2024e93763749756656 (diff)
downloadblackbird-op-linux-fd6441ec0ff9803e405df70a7cae784f2c9be204.tar.gz
blackbird-op-linux-fd6441ec0ff9803e405df70a7cae784f2c9be204.zip
ARM: tegra: modify Tegra30 USB2 default phy_type to UTMI
Modify Tegra30 default USB2 phy_type to UTMI; this matches power-on-reset defaults and is expected to be the common case. The current implementation is likely an incorrect carry-over from Tegra20, where USB2 does default to ULPI. Signed-off-by: Eric Brower <ebrower@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi21
1 files changed, 16 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index ee5e9d8bf194..ed8e7700b46d 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -785,7 +785,7 @@
compatible = "nvidia,tegra30-ehci", "usb-ehci";
reg = <0x7d004000 0x4000>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- phy_type = "ulpi";
+ phy_type = "utmi";
clocks = <&tegra_car TEGRA30_CLK_USB2>;
resets = <&tegra_car 58>;
reset-names = "usb";
@@ -795,12 +795,23 @@
phy2: usb-phy@7d004000 {
compatible = "nvidia,tegra30-usb-phy";
- reg = <0x7d004000 0x4000>;
- phy_type = "ulpi";
+ reg = <0x7d004000 0x4000 0x7d000000 0x4000>;
+ phy_type = "utmi";
clocks = <&tegra_car TEGRA30_CLK_USB2>,
<&tegra_car TEGRA30_CLK_PLL_U>,
- <&tegra_car TEGRA30_CLK_CDEV2>;
- clock-names = "reg", "pll_u", "ulpi-link";
+ <&tegra_car TEGRA30_CLK_USBD>;
+ clock-names = "reg", "pll_u", "utmi-pads";
+ nvidia,hssync-start-delay = <9>;
+ nvidia,idle-wait-delay = <17>;
+ nvidia,elastic-limit = <16>;
+ nvidia,term-range-adj = <6>;
+ nvidia,xcvr-setup = <51>;
+ nvidia.xcvr-setup-use-fuses;
+ nvidia,xcvr-lsfslew = <2>;
+ nvidia,xcvr-lsrslew = <2>;
+ nvidia,xcvr-hsslew = <32>;
+ nvidia,hssquelch-level = <2>;
+ nvidia,hsdiscon-level = <5>;
status = "disabled";
};
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