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author | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-11-21 12:05:00 +0100 |
---|---|---|
committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-11-28 15:14:20 +0100 |
commit | fbb1f83c15a9c69c66a4312227cc638605eedbda (patch) | |
tree | 57e8d5bad08ffeeb7080d8e9f4ff88004af33ffb | |
parent | 9e41b5e966fe478bbef3cf795cf07c8d6fcb1ccb (diff) | |
download | blackbird-op-linux-fbb1f83c15a9c69c66a4312227cc638605eedbda.tar.gz blackbird-op-linux-fbb1f83c15a9c69c66a4312227cc638605eedbda.zip |
ARM: dts: sunxi: reference: Move the muxing back to the common DTSI
Now that all the SoCs using the tablet reference design DTSI are using the
same pinctrl naming scheme, we can move back the pinctrl phandles to the
main DTSI.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
-rw-r--r-- | arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi | 8 | ||||
-rw-r--r-- | arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi | 9 | ||||
-rw-r--r-- | arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi | 6 |
3 files changed, 3 insertions, 20 deletions
diff --git a/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi index b046436ff773..6202aabedbfe 100644 --- a/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi +++ b/arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi @@ -76,8 +76,6 @@ }; &i2c0 { - pinctrl-0 = <&i2c0_pins>; - axp209: pmic@34 { reg = <0x34>; interrupts = <0>; @@ -85,8 +83,6 @@ }; &i2c1 { - pinctrl-0 = <&i2c1_pins>; - /* * The gsl1680 is rated at 400KHz and it will not work reliable at * 100KHz, this has been confirmed on multiple different q8 tablets. @@ -150,10 +146,6 @@ }; }; -&pwm { - pinctrl-0 = <&pwm0_pin>; -}; - ®_dcdc2 { regulator-always-on; regulator-min-microvolt = <1000000>; diff --git a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi index 787a3121e179..0111e6c6f177 100644 --- a/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi +++ b/arch/arm/boot/dts/sun8i-reference-design-tablet.dtsi @@ -62,7 +62,6 @@ }; &i2c0 { - pinctrl-0 = <&i2c0_pins>; /* * The gsl1680 is rated at 400KHz and it will not work reliable at * 100KHz, this has been confirmed on multiple different q8 tablets. @@ -80,10 +79,6 @@ }; }; -&i2c1 { - pinctrl-0 = <&i2c1_pins>; -}; - &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>; @@ -101,10 +96,6 @@ }; }; -&pwm { - pinctrl-0 = <&pwm0_pin>; -}; - &r_rsb { status = "okay"; diff --git a/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi b/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi index 00dc6623f30f..117198c52e1f 100644 --- a/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi +++ b/arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi @@ -46,13 +46,13 @@ &i2c0 { pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; + pinctrl-0 = <&i2c0_pins>; status = "okay"; }; &i2c1 { pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; + pinctrl-0 = <&i2c1_pins>; status = "okay"; }; @@ -77,6 +77,6 @@ &pwm { pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pins>; + pinctrl-0 = <&pwm0_pin>; status = "okay"; }; |