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authorPaul Mundt <lethal@linux-sh.org>2009-08-15 10:48:13 +0900
committerPaul Mundt <lethal@linux-sh.org>2009-08-15 10:48:13 +0900
commite82da214d2fe3dc2610df966100c4f36bc0fad91 (patch)
tree27904e62592da9c84499509cc85429644dcd0b93
parentaae4d1428c03b03f9fe6204a83e35822fe9cc591 (diff)
downloadblackbird-op-linux-e82da214d2fe3dc2610df966100c4f36bc0fad91.tar.gz
blackbird-op-linux-e82da214d2fe3dc2610df966100c4f36bc0fad91.zip
sh: Track the CPU family in sh_cpuinfo.
This adds a family member to struct sh_cpuinfo, which allows us to fall back more on the probe routines to work out what sort of subtype we are running on. This will be used by the CPU cache initialization code in order to first do family-level initialization, followed by subtype-level optimizations. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--arch/sh/include/asm/bugs.h24
-rw-r--r--arch/sh/include/asm/processor.h13
-rw-r--r--arch/sh/kernel/cpu/sh2/probe.c1
-rw-r--r--arch/sh/kernel/cpu/sh2a/probe.c2
-rw-r--r--arch/sh/kernel/cpu/sh3/probe.c2
-rw-r--r--arch/sh/kernel/cpu/sh4/probe.c9
-rw-r--r--arch/sh/kernel/cpu/sh5/probe.c2
-rw-r--r--arch/sh/kernel/setup.c1
8 files changed, 39 insertions, 15 deletions
diff --git a/arch/sh/include/asm/bugs.h b/arch/sh/include/asm/bugs.h
index 4924ff6f5439..46260fcbdf4b 100644
--- a/arch/sh/include/asm/bugs.h
+++ b/arch/sh/include/asm/bugs.h
@@ -21,25 +21,25 @@ static void __init check_bugs(void)
current_cpu_data.loops_per_jiffy = loops_per_jiffy;
- switch (current_cpu_data.type) {
- case CPU_SH7619:
+ switch (current_cpu_data.family) {
+ case CPU_FAMILY_SH2:
*p++ = '2';
break;
- case CPU_SH7201 ... CPU_MXG:
+ case CPU_FAMILY_SH2A:
*p++ = '2';
*p++ = 'a';
break;
- case CPU_SH7705 ... CPU_SH7729:
+ case CPU_FAMILY_SH3:
*p++ = '3';
break;
- case CPU_SH7750 ... CPU_SH4_501:
+ case CPU_FAMILY_SH4:
*p++ = '4';
break;
- case CPU_SH7763 ... CPU_SHX3:
+ case CPU_FAMILY_SH4A:
*p++ = '4';
*p++ = 'a';
break;
- case CPU_SH7343 ... CPU_SH7366:
+ case CPU_FAMILY_SH4AL_DSP:
*p++ = '4';
*p++ = 'a';
*p++ = 'l';
@@ -48,15 +48,15 @@ static void __init check_bugs(void)
*p++ = 's';
*p++ = 'p';
break;
- case CPU_SH5_101 ... CPU_SH5_103:
+ case CPU_FAMILY_SH5:
*p++ = '6';
*p++ = '4';
break;
- case CPU_SH_NONE:
+ case CPU_FAMILY_UNKNOWN:
/*
- * Specifically use CPU_SH_NONE rather than default:,
- * so we're able to have the compiler whine about
- * unhandled enumerations.
+ * Specifically use CPU_FAMILY_UNKNOWN rather than
+ * default:, so we're able to have the compiler whine
+ * about unhandled enumerations.
*/
break;
}
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index ff7daaf9a620..db1a4f3a755f 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -44,6 +44,17 @@ enum cpu_type {
CPU_SH_NONE
};
+enum cpu_family {
+ CPU_FAMILY_SH2,
+ CPU_FAMILY_SH2A,
+ CPU_FAMILY_SH3,
+ CPU_FAMILY_SH4,
+ CPU_FAMILY_SH4A,
+ CPU_FAMILY_SH4AL_DSP,
+ CPU_FAMILY_SH5,
+ CPU_FAMILY_UNKNOWN,
+};
+
/*
* TLB information structure
*
@@ -61,7 +72,7 @@ struct tlb_info {
};
struct sh_cpuinfo {
- unsigned int type;
+ unsigned int type, family;
int cut_major, cut_minor;
unsigned long loops_per_jiffy;
unsigned long asid_cache;
diff --git a/arch/sh/kernel/cpu/sh2/probe.c b/arch/sh/kernel/cpu/sh2/probe.c
index 5916d9096b99..1db6d8883888 100644
--- a/arch/sh/kernel/cpu/sh2/probe.c
+++ b/arch/sh/kernel/cpu/sh2/probe.c
@@ -29,6 +29,7 @@ int __init detect_cpu_and_cache_system(void)
*/
boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED;
boot_cpu_data.icache = boot_cpu_data.dcache;
+ boot_cpu_data.family = CPU_FAMILY_SH2;
return 0;
}
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c
index e098e2f6aa08..6825d6507164 100644
--- a/arch/sh/kernel/cpu/sh2a/probe.c
+++ b/arch/sh/kernel/cpu/sh2a/probe.c
@@ -15,6 +15,8 @@
int __init detect_cpu_and_cache_system(void)
{
+ boot_cpu_data.family = CPU_FAMILY_SH2A;
+
/* All SH-2A CPUs have support for 16 and 32-bit opcodes.. */
boot_cpu_data.flags |= CPU_HAS_OP32;
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c
index 10f2a760c5ee..f9c7df64eb01 100644
--- a/arch/sh/kernel/cpu/sh3/probe.c
+++ b/arch/sh/kernel/cpu/sh3/probe.c
@@ -107,5 +107,7 @@ int __uses_jump_to_uncached detect_cpu_and_cache_system(void)
boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED;
boot_cpu_data.icache = boot_cpu_data.dcache;
+ boot_cpu_data.family = CPU_FAMILY_SH3;
+
return 0;
}
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index 6c78d0a9c857..1148607c36bf 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -57,8 +57,12 @@ int __init detect_cpu_and_cache_system(void)
* Setup some generic flags we can probe on SH-4A parts
*/
if (((pvr >> 16) & 0xff) == 0x10) {
- if ((cvr & 0x10000000) == 0)
+ boot_cpu_data.family = CPU_FAMILY_SH4A;
+
+ if ((cvr & 0x10000000) == 0) {
boot_cpu_data.flags |= CPU_HAS_DSP;
+ boot_cpu_data.family = CPU_FAMILY_SH4AL_DSP;
+ }
boot_cpu_data.flags |= CPU_HAS_LLSC | CPU_HAS_PERF_COUNTER;
boot_cpu_data.cut_major = pvr & 0x7f;
@@ -68,6 +72,7 @@ int __init detect_cpu_and_cache_system(void)
} else {
/* And some SH-4 defaults.. */
boot_cpu_data.flags |= CPU_HAS_PTEA;
+ boot_cpu_data.family = CPU_FAMILY_SH4;
}
/* FPU detection works for everyone */
@@ -174,7 +179,7 @@ int __init detect_cpu_and_cache_system(void)
break;
default:
- boot_cpu_data.type = CPU_SH_NONE;
+ boot_cpu_data.type = boot_cpu_data.family = CPU_SH_NONE;
break;
}
diff --git a/arch/sh/kernel/cpu/sh5/probe.c b/arch/sh/kernel/cpu/sh5/probe.c
index 92ad844b5c12..521d05b3f7ba 100644
--- a/arch/sh/kernel/cpu/sh5/probe.c
+++ b/arch/sh/kernel/cpu/sh5/probe.c
@@ -34,6 +34,8 @@ int __init detect_cpu_and_cache_system(void)
/* CPU.VCR aliased at CIR address on SH5-101 */
boot_cpu_data.type = CPU_SH5_101;
+ boot_cpu_data.family = CPU_FAMILY_SH5;
+
/*
* First, setup some sane values for the I-cache.
*/
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index ceb409bf7741..dc403e42bcab 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -49,6 +49,7 @@
struct sh_cpuinfo cpu_data[NR_CPUS] __read_mostly = {
[0] = {
.type = CPU_SH_NONE,
+ .family = CPU_FAMILY_UNKNOWN,
.loops_per_jiffy = 10000000,
},
};
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