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authorAndrea Shepard <andrea@persephoneslair.org>2008-10-19 23:33:03 -0700
committerDavid S. Miller <davem@davemloft.net>2008-10-22 21:53:40 -0700
commite0037df3852b4b60edbe01f70f4968e4a9fdb272 (patch)
tree44b1c67b743ba4b36bf22a7b4044b2a9b9d1b35a
parent2515ddc6db8eb49a79f0fe5e67ff09ac7c81eab4 (diff)
downloadblackbird-op-linux-e0037df3852b4b60edbe01f70f4968e4a9fdb272.tar.gz
blackbird-op-linux-e0037df3852b4b60edbe01f70f4968e4a9fdb272.zip
sparc64: Fix race in arch/sparc64/kernel/trampoline.S
Make arch/sparc64/kernel/trampoline.S in 2.6.27.1 lock prom_entry_lock when calling the PROM. This prevents a race condition that I observed causing a hang on startup on a 12-CPU E4500. I am not subscribed to this list, so please CC me on replies. Signed-off-by: Andrea Shepard <andrea@persephoneslair.org> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--arch/sparc64/kernel/trampoline.S18
1 files changed, 14 insertions, 4 deletions
diff --git a/arch/sparc64/kernel/trampoline.S b/arch/sparc64/kernel/trampoline.S
index 704a3afcfd06..83abd5ae88a4 100644
--- a/arch/sparc64/kernel/trampoline.S
+++ b/arch/sparc64/kernel/trampoline.S
@@ -328,6 +328,12 @@ after_lock_tlb:
wrpr %g0, 0, %wstate
+ sethi %hi(prom_entry_lock), %g2
+1: ldstub [%g2 + %lo(prom_entry_lock)], %g1
+ membar #StoreLoad | #StoreStore
+ brnz,pn %g1, 1b
+ nop
+
/* As a hack, put &init_thread_union into %g6.
* prom_world() loads from here to restore the %asi
* register.
@@ -337,7 +343,7 @@ after_lock_tlb:
sethi %hi(is_sun4v), %o0
lduw [%o0 + %lo(is_sun4v)], %o0
- brz,pt %o0, 1f
+ brz,pt %o0, 2f
nop
TRAP_LOAD_TRAP_BLOCK(%g2, %g3)
@@ -369,10 +375,10 @@ after_lock_tlb:
call %o1
add %sp, (2047 + 128), %o0
- ba,pt %xcc, 2f
+ ba,pt %xcc, 3f
nop
-1: sethi %hi(sparc64_ttable_tl0), %o0
+2: sethi %hi(sparc64_ttable_tl0), %o0
set prom_set_trap_table_name, %g2
stx %g2, [%sp + 2047 + 128 + 0x00]
mov 1, %g2
@@ -386,7 +392,11 @@ after_lock_tlb:
call %o1
add %sp, (2047 + 128), %o0
-2: ldx [%l0], %g6
+3: sethi %hi(prom_entry_lock), %g2
+ stb %g0, [%g2 + %lo(prom_entry_lock)]
+ membar #StoreStore | #StoreLoad
+
+ ldx [%l0], %g6
ldx [%g6 + TI_TASK], %g4
mov 1, %g5
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