diff options
| author | Greg Ungerer <gerg@uclinux.org> | 2011-10-17 15:09:44 +1000 |
|---|---|---|
| committer | Greg Ungerer <gerg@uclinux.org> | 2011-12-30 10:20:30 +1000 |
| commit | b852de4e7f7d6f4373901e3a880f6f29a65e7937 (patch) | |
| tree | c5c39d34fdd49fc32edbba7c12e492f1f0b618b0 | |
| parent | 0b0b808b50fd135c6bb22f773d216c3bcacb20d7 (diff) | |
| download | blackbird-op-linux-b852de4e7f7d6f4373901e3a880f6f29a65e7937.tar.gz blackbird-op-linux-b852de4e7f7d6f4373901e3a880f6f29a65e7937.zip | |
m68k: add TLB flush support for the ColdFire V4e MMU hardware
The ColdFire V4e MMU is unlike any of the other m68k MMU hardware.
It needs its own TLB flush support code.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
| -rw-r--r-- | arch/m68k/include/asm/tlbflush.h | 23 |
1 files changed, 17 insertions, 6 deletions
diff --git a/arch/m68k/include/asm/tlbflush.h b/arch/m68k/include/asm/tlbflush.h index a6b4ed4fc90f..965ea35c9a40 100644 --- a/arch/m68k/include/asm/tlbflush.h +++ b/arch/m68k/include/asm/tlbflush.h @@ -5,10 +5,13 @@ #ifndef CONFIG_SUN3 #include <asm/current.h> +#include <asm/mcfmmu.h> static inline void flush_tlb_kernel_page(void *addr) { - if (CPU_IS_040_OR_060) { + if (CPU_IS_COLDFIRE) { + mmu_write(MMUOR, MMUOR_CNL); + } else if (CPU_IS_040_OR_060) { mm_segment_t old_fs = get_fs(); set_fs(KERNEL_DS); __asm__ __volatile__(".chip 68040\n\t" @@ -25,12 +28,15 @@ static inline void flush_tlb_kernel_page(void *addr) */ static inline void __flush_tlb(void) { - if (CPU_IS_040_OR_060) + if (CPU_IS_COLDFIRE) { + mmu_write(MMUOR, MMUOR_CNL); + } else if (CPU_IS_040_OR_060) { __asm__ __volatile__(".chip 68040\n\t" "pflushan\n\t" ".chip 68k"); - else if (CPU_IS_020_OR_030) + } else if (CPU_IS_020_OR_030) { __asm__ __volatile__("pflush #0,#4"); + } } static inline void __flush_tlb040_one(unsigned long addr) @@ -43,7 +49,9 @@ static inline void __flush_tlb040_one(unsigned long addr) static inline void __flush_tlb_one(unsigned long addr) { - if (CPU_IS_040_OR_060) + if (CPU_IS_COLDFIRE) + mmu_write(MMUOR, MMUOR_CNL); + else if (CPU_IS_040_OR_060) __flush_tlb040_one(addr); else if (CPU_IS_020_OR_030) __asm__ __volatile__("pflush #0,#4,(%0)" : : "a" (addr)); @@ -56,12 +64,15 @@ static inline void __flush_tlb_one(unsigned long addr) */ static inline void flush_tlb_all(void) { - if (CPU_IS_040_OR_060) + if (CPU_IS_COLDFIRE) { + mmu_write(MMUOR, MMUOR_CNL); + } else if (CPU_IS_040_OR_060) { __asm__ __volatile__(".chip 68040\n\t" "pflusha\n\t" ".chip 68k"); - else if (CPU_IS_020_OR_030) + } else if (CPU_IS_020_OR_030) { __asm__ __volatile__("pflusha"); + } } static inline void flush_tlb_mm(struct mm_struct *mm) |
